UMK107C5105KA-T Taiyo Yuden, UMK107C5105KA-T Datasheet - Page 15

• Manufacturer Part Number: UMK107C5105KA-T
• Description: CAP CER 1.0UF 50V X5S 0603
• Manufacturer: Taiyo Yuden
• Series: UMKr

Specifications of UMK107C5105KA-T

• Capacitance: 1.0µF
• Voltage - Rated: 50V
• Tolerance: ±10%
• Temperature Coefficient: X5S
• Mounting Type: Surface Mount, MLCC
• Operating Temperature: -55°C ~ 85°C
• Applications: General Purpose
• Package / Case: 0603 (1608 Metric)
• Size / Dimension: 0.063" L x 0.031" W (1.60mm x 0.80mm)
• Thickness: 0.80mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Ratings: -
• Lead Spacing: -
• Other names: 587-1257-2; CE UMK107 C105KA-T; UMK107C105KA-T

Precautions on the use of Multilayer Ceramic Capacitors
2.PCB Design
PRECAUTIONS
Stages
Pattern configurations
(Capacitor layout on panelized [breakaway] PC boards)
1. After capacitors have been mounted on the boards, chips can
be subjected to mechanical stresses in subsequent manufac-
turing processes (PCB cutting, board inspection, mounting of
additional parts, assembly into the chassis, wave soldering
the reflow soldered boards etc.) For this reason, planning
pattern configurations and the position of SMD capacitors
should be carefully performed to minimize stress.
Precautions
1-1. The following are examples of good and bad capacitor layout; SMD capacitors should be
1-2. To layout the capacitors for the breakaway PC board, it should be noted that the amount
1-3. When breaking PC boards along their perforations, the amount of mechanical stress on
Mixed mounting
of SMD and
leaded
components
Hand-soldering
of leaded
components
near mounted
components
Horizontal
component
placement
Component
placement close
to the chassis
Deflection of
(2) Examples of good and bad solder application
located to minimize any possible mechanical stresses from board warp or deflection.
of mechanical stresses given will vary depending on capacitor layout. The example
below shows recommendations for better design.
the capacitors can vary according to the method used. The following methods are
listed in order from least stressful to most stressful: push-back, slit, V-grooving, and
perforation. Thus, any ideal SMD capacitor layout must also consider the PCB splitting
procedure.
the board
Items
Not recommended
Not recommended
Technical considerations
Recommended
Recommended
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