TV04A171JB-G Comchip Technology, TV04A171JB-G Datasheet - Page 28
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TV04A171JB-G
Manufacturer Part Number
TV04A171JB-G
Description
TVS 400W 170V BIDIRECT SMA
Manufacturer
Comchip Technology
Specifications of TV04A171JB-G
Voltage - Reverse Standoff (typ)
170V
Voltage - Breakdown
189V
Power (watts)
400W
Polarization
Bidirectional
Mounting Type
Surface Mount
Package / Case
DO-214AC, SMA
Channels
1 Channel
Clamping Voltage
275 V
Operating Voltage
3.5 V
Breakdown Voltage
189 V
Peak Surge Current
40 A
Peak Pulse Power Dissipation
400 W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10. Command Definitions
10.1
10.2
10.3
28
Reading Array Data
Reset Command
Autoselect Command Sequence
Writing specific address and data commands or sequences into the command register initiates device
operations.
address and data values or writing them in the improper sequence resets the device to reading array data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens first. Refer to the appropriate timing diagrams in
Characteristics on page
The device is automatically set to reading array data after device power-up. No commands are required to
retrieve data. The device is also ready to read array data after completing an Embedded Program or
Embedded Erase algorithm.
After the device accepts an Erase Suspend command, the device enters the Erase Suspend mode. The
system can read array data using the standard read timings, except that if it reads at an address within erase-
suspended sectors, the device outputs status data. After completing a programming operation in the Erase
Suspend mode, the system may once again read array data with the same exception. See
Erase Resume Commands on page 31
The system must issue the reset command to re-enable the device for reading array data if DQ5 goes high, or
while in the autoselect mode. See
See also
on page 42
Writing the reset command to the device resets the device to reading array data. Address bits are don’t care
for this command.
The reset command may be written between the sequence cycles in an erase command sequence before
erasing begins. This resets the device to reading array data. Once erasure begins, however, the device
ignores reset commands until the operation is complete.
The reset command may be written between the sequence cycles in a program command sequence before
programming begins. This resets the device to reading array data (also applies to programming in Erase
Suspend mode). Once programming begins, however, the device ignores reset commands until the operation
is complete.
The reset command may be written between the sequence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must be written to return to reading array data (also applies
to autoselect during Erase Suspend).
If DQ5 goes high during a program or erase operation, writing the reset command returns the device to
reading array data (also applies during Erase Suspend).
The autoselect command sequence allows the host system to access the manufacturer and devices codes,
and determine whether or not a sector is protected.
requirements. This method is an alternative to that shown in
PROM programmers and requires V
The autoselect command sequence is initiated by writing two unlock cycles, followed by the autoselect
command. The device then enters the autoselect mode, and the system may read at any address any
number of times, without initiating another command sequence.
A read cycle at address XX00h retrieves the manufacturer code. A read cycle at address XX01h returns the
device code. A read cycle containing a sector address (SA) and the address 02h in word mode (or 04h in byte
mode) returns 01h if that sector is protected, or 00h if it is unprotected. Refer to
Table 7.4 on page 18
The system must write the reset command to exit the autoselect mode and return to reading array data.
Requirements for Reading Array Data on page 14
Table 10.1 on page 33
provides the read parameters, and
for valid sector addresses.
42.
Reset Command on page
defines the valid register command sequences. Writing incorrect
ID
on address bit A9.
for more information on this mode.
S29AL008J
D a t a
Figure 17.1 on page 42
Table 10.1 on page 33
S h e e t
for more information. The
Table 7.6 on page
28.
shows the timing diagram.
S29AL008J_00_09 February 23, 2010
shows the address and data
19, which is intended for
Table 7.2 on page 17
Read Operations
Erase Suspend/
AC
and