TV04A171JB-G Comchip Technology, TV04A171JB-G Datasheet - Page 38
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TV04A171JB-G
Manufacturer Part Number
TV04A171JB-G
Description
TVS 400W 170V BIDIRECT SMA
Manufacturer
Comchip Technology
Specifications of TV04A171JB-G
Voltage - Reverse Standoff (typ)
170V
Voltage - Breakdown
189V
Power (watts)
400W
Polarization
Bidirectional
Mounting Type
Surface Mount
Package / Case
DO-214AC, SMA
Channels
1 Channel
Clamping Voltage
275 V
Operating Voltage
3.5 V
Breakdown Voltage
189 V
Peak Surge Current
40 A
Peak Pulse Power Dissipation
400 W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.6
11.7
38
DQ5: Exceeded Timing Limits
DQ3: Sector Erase Timer
DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a 1. This is a failure condition that indicates the program or erase cycle was
not successfully completed.
The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously
programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device
halts the operation, and when the operation has exceeded the timing limits, DQ5 produces a 1.
Under both these conditions, the system must issue the reset command to return the device to reading array
data.
After writing a sector erase command sequence, the system may read DQ3 to determine whether or not an
erase operation has begun. (The sector erase timer does not apply to the chip erase command.) If additional
sectors are selected for erasure, the entire time-out also applies after each additional sector erase command.
When the time-out is complete, DQ3 switches from 0 to 1. The system may ignore DQ3 if the system can
guarantee that the time between additional sector erase commands will always be less than 50 μs. See
also
After the sector erase command sequence is written, the system should read the status on DQ7 (Data#
Polling) or DQ6 (Toggle Bit I) to ensure the device has accepted the command sequence, and then read
DQ3. If DQ3 is 1, the internally controlled erase cycle has begun; all further commands (other than Erase
Suspend) are ignored until the erase operation is complete. If DQ3 is 0, the device will accept additional
sector erase commands. To ensure the command has been accepted, the system software should check the
status of DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second
status check, the last command might not have been accepted.
Notes
1. DQ5 switches to 1 when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
Standard
Mode
Erase
Suspend
Mode
Exceeded Timing Limits on page 38
Sector Erase Command Sequence on page
Embedded Program Algorithm
Embedded Erase Algorithm
Reading within Erase
Suspended Sector
Reading within Non-Erase
Suspended Sector
Erase-Suspend-Program
Operation
for more information.
Table 11.1 Write Operation Status
S29AL008J
(Note 2)
DQ7#
DQ7#
Data
DQ7
0
1
D a t a
31.
No toggle
Toggle
Toggle
Toggle
Data
DQ6
S h e e t
Table 11.1
(Note 1)
DQ5
Data
0
0
0
0
S29AL008J_00_09 February 23, 2010
shows the outputs for DQ3.
DQ3
Data
N/A
N/A
N/A
1
No toggle
(Note 2)
Toggle
Toggle
DQ2
Data
N/A
RY/BY#
DQ5:
0
0
1
1
0