TV04A640JB-G Comchip Technology, TV04A640JB-G Datasheet - Page 24

TVS 400W 64V BIDIRECT SMA

TV04A640JB-G

Manufacturer Part Number
TV04A640JB-G
Description
TVS 400W 64V BIDIRECT SMA
Manufacturer
Comchip Technology
Datasheets

Specifications of TV04A640JB-G

Voltage - Reverse Standoff (typ)
64V
Voltage - Breakdown
71.1V
Power (watts)
400W
Polarization
Bidirectional
Mounting Type
Surface Mount
Package / Case
DO-214AC, SMA
Channels
1 Channel
Clamping Voltage
103 V
Operating Voltage
3.5 V
Breakdown Voltage
71.1 V
Peak Surge Current
40 A
Peak Pulse Power Dissipation
400 W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.4
24
11.4.1
Read Manufacturer and Device ID (READ_ID: 90h)
Serial Mode
The READ_ID (90h) instruction identifies the Device Manufacturer ID and the Device ID. The instruction is
initiated by driving the CS# pin low and shifting in (via the SI input pin) the instruction code “90h” followed by
a 24-bit address of XXXXX0h. (X: High or Low) Following this, the Manufacturer ID and the Device ID are
shifted out on SO output pin starting after the falling edge of the SCK serial clock input signal. The
Manufacturer ID and the Device ID are always shifted out on the SO output pin with the MSB first, as shown
in
Manufacturer ID. Note that the upper 23 bits of the address do not have to be 0’s and can be don’t cares.
Once the device is in READ_ID mode, the Manufacturer ID and Device ID output data toggles between
address 000000H and 000001H until terminated by a low to high transition on the CS# input pin. After the first
24-bit address is provided, the user must wait 16 clock cycles for both the Manufacturer ID and Device ID to
be output on the SO output pin. The maximum clock frequency for the READ_ID (90h) command is at
104MHz (Fast Read). Parallel Mode the maximum clock frequency is 10 Mhz.
The Manufacturer ID & Device ID is output continuously until terminated by a low to high transition on CS#
chip select input pin.
After issuing READ_ID instruction, driving the CS# chip select input pin to the logic high state will
automatically send the device into the standby mode. Driving the CS# chip select input pin to the logic low
state again will automatically send the device out of the standby mode and into the active mode.
Figure
SCK
CS#
SCK
CS#
SO
SI
SO
SI
11.6. If the 24-bit address is set to XXXXX1h, then the Device ID is read out first followed by the
24
7
25
0
6
High Impedance
26
High Impedance
1
5
24-Bit Address
27
4
2
Figure 11.6 Serial READ_ID Instruction Sequence
Instruction
28
3
3
90h
29
2
4
1
30
5
S25FL128P
0
31
6
MSB
7
32
7
D a t a
6
33
8
23 22 21 20 19 18 17 16
5
Manufacturer ID
34
9
High Impedance
4
35
10
S h e e t
24-Bit Address
3
36
11
2
37
12
1
38
13
0
39
14
MSB
7
40
15
S25FL128P_00_08 September 8, 2009
6
41
16
15 14 13 12 11 10
5
42
17
Device ID
4
43
18
3
44
19
2
45
20
46
1
21
0
47
9
22
8
23

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