PIC16F684-I/ST Microchip Technology, PIC16F684-I/ST Datasheet - Page 110

• Manufacturer Part Number: PIC16F684-I/ST
• Description: IC PIC MCU FLASH 2KX14 14TSSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F684-I/ST

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-TSSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOP
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F684
FIGURE 12-8:
TABLE 12-6:
DS41202F-page 108
INTCON
IOCA
PIR1
PIE1
Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.
INSTRUCTION FLOW
Name
GIE bit
(INTCON reg.)
INTF flag
(INTCON reg.)
CLKOUT
INT pin
OSC1
Note 1: INTF flag is sampled here (every Q1).
Instruction
Executed
Instruction
Fetched
PC
2: Asynchronous interrupt latency = 3-4 T
3: CLKOUT is available only in INTOSC and RC Oscillator modes.
4: For minimum width of INT pulse, refer to AC specifications in Section 15.0 “Electrical Specifications”.
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
Shaded cells are not used by the interrupt module.
(3)
EEIF
EEIE
is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
Bit 7
GIE
—
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
Q1
Inst (PC – 1)
Inst (PC)
(1)
INT PIN INTERRUPT TIMING
Q2
ADIE
PEIE
ADIF
Bit 6
PC
—
(4)
Q3 Q4
CCP1IF
CCP1IE
IOCA5
(5)
Bit 5
T0IE
Q1
Inst (PC + 1)
Inst (PC)
IOCA4 IOCA3 IOCA2
INTE
C2IE
Bit 4
C2IF
Q2
(1)
PC + 1
Q3 Q4
CY
. Synchronous latency = 3 T
RAIE
C1IE
Bit 3
C1IF
Interrupt Latency
Q1
OSFIF
OSFIE
Dummy Cycle
Bit 2
T0IF
Q2
PC + 1
—
Q3 Q4
TMR2IF
TMR2IE
IOCA1
INTF
Bit 1
(2)
CY
, where T
Q1
Dummy Cycle
Inst (0004h)
TMR1IF 0000 0000 0000 0000
TMR1IE 0000 0000 0000 0000
IOCA0
Q2
RAIF
Bit 0
0004h
CY
= instruction cycle time. Latency
Q3 Q4
© 2007 Microchip Technology Inc.
0000 0000 0000 0000
--00 0000 --00 0000
POR, BOR
Value on:
Q1
Inst (0005h)
Q2
Inst (0004h)
0005h
Value on
all other
Q3 Q4
Resets