PIC16F1933-I/MV Microchip Technology, PIC16F1933-I/MV Datasheet - Page 88
![IC MCU 8BIT FLASH 28-UQFN](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16F1933-I/MV
Manufacturer Part Number
PIC16F1933-I/MV
Description
IC MCU 8BIT FLASH 28-UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1933-IMV.pdf
(14 pages)
Specifications of PIC16F1933-I/MV
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Controller Family/series
PIC16F
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
5
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1933-I/MV
Manufacturer:
TI
Quantity:
9
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1933-IMV PDF datasheet #4
- Current page: 88 of 508
- Download datasheet (5Mb)
PIC16F193X/LF193X
6.3
The MCLR is an optional external input that can reset
the device. The MCLR function is controlled by the
MCLRE bit of Configuration Word 1 and the LVP bit of
Configuration Word 2 (Table 6-2).
TABLE 6-2:
6.3.1
When MCLR is enabled and the pin is held low, the
device is held in Reset. The MCLR pin is connected to
V
The device has a noise filter in the MCLR Reset path.
The filter will detect and ignore small pulses.
6.3.2
When MCLR is disabled, the pin functions as a general
purpose input and the internal weak pull-up is under
software
Registers” for more information.
6.4
The Watchdog Timer generates a Reset if the firmware
does not issue a CLRWDT instruction within the time-out
period. The TO and PD bits in the STATUS register are
changed to indicate the WDT Reset. See Section 10.0
“Watchdog Timer” for more information.
6.5
A RESET instruction will cause a device Reset. The RI
bit in the PCON register will be set to ‘0’. See Table 6-4
for default conditions after a RESET instruction has
occurred.
6.6
The device can reset when the Stack Overflows or
Underflows. The STKOVF or STKUNF bits of the PCON
register indicate the Reset condition. These Resets are
enabled by setting the STVREN bit in Configuration Word
2. See Section 3.4.2 “Overflow/Underflow Reset” for
more information.
DS41364D-page 88
DD
Note:
through an internal weak pull-up.
MCLRE
0
1
x
MCLR
Watchdog Timer (WDT) Reset
RESET Instruction
Stack Overflow/Underflow Reset
control.
MCLR ENABLED
A Reset does not drive the MCLR pin low.
MCLR DISABLED
MCLR CONFIGURATION
See
LVP
0
0
1
Section 12.6
Disabled
Enabled
Enabled
MCLR
“PORTE
Preliminary
6.7
Upon exit of Programming mode, the device will
behave as if a POR had just occurred.
6.8
The Power-up Timer optionally delays device execution
after a BOR or POR event. This timer is typically used to
allow V
running.
The Power-up Timer is controlled by the PWRTE bit of
Configuration Word 1.
6.9
Upon the release of a POR or BOR, the following must
occur before the device will begin executing:
1.
2.
3.
The total time-out will vary based on oscillator configu-
ration and Power-up
Section 5.0 “Oscillator Module (With Fail-Safe
Clock Monitor)” for more information.
The Power-up Timer and oscillator start-up timer run
independently of MCLR Reset. If MCLR is kept low
long enough, the Power-up Timer and oscillator start-
up timer will expire. Upon bringing MCLR high, the
device will begin execution immediately (see Figure 6-
4). This is useful for testing purposes or to synchronize
more than one device operating in parallel.
Power-up Timer runs to completion (if enabled).
Oscillator start-up timer runs to completion (if
required for oscillator source).
MCLR must be released (if enabled).
DD
Programming Mode Exit
Power-Up Timer
Start-up Sequence
to stabilize before allowing the device to start
2009 Microchip Technology Inc.
Timer
configuration.
See
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