PIC18F13K22-I/SO Microchip Technology, PIC18F13K22-I/SO Datasheet - Page 252

• Manufacturer Part Number: PIC18F13K22-I/SO
• Description: IC MCU 8BIT 8KB FLASH 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K22-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 20SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 2.05 mm
• Length: 12.8 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V, 2.7 V
• Width: 7.5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
21.4
PIC18F1XK22/LF1XK22 devices implement a BOR cir-
cuit that provides the user with a number of configura-
tion and power-saving options. The BOR is controlled
by the BORV<1:0> and BOREN<1:0> bits of the
CONFIG2L Configuration register. There are a total of
four BOR configurations which are summarized in
Table 21-1.
The BOR threshold is set by the BORV<1:0> bits. If
BOR is enabled (any values of BOREN<1:0>, except
‘00’), any drop of V
T
occur if V
chip will remain in Brown-out Reset until V
above V
If the Power-up Timer is enabled, it will be invoked after
V
Reset for an additional time delay, T
below V
chip will go back into a Brown-out Reset and the
Power-up Timer will be initialized. Once V
above V
additional time delay.
BOR
independently configured. Enabling BOR Reset does
not automatically enable the PWRT.
21.4.1
When BOREN<1:0> = 01, the BOR can be enabled or
disabled by the user in software. This is done with the
SBOREN control bit of the RCON register. Setting
SBOREN enables the BOR to function as previously
described. Clearing SBOREN disables the BOR
entirely. The SBOREN bit operates only in this mode;
otherwise it is read as ‘0’.
TABLE 21-1:
DS41365D-page 252
BOR
DD
BOREN1
BOR Configuration
rises above V
0
0
1
1
will reset the device. A Reset may or may not
and
BOR
BOR
Brown-out Reset (BOR)
BOR
DD
SOFTWARE ENABLED BOR
.
while the Power-up Timer is running, the
, the Power-up Timer will execute the
falls below V
the
BOREN0
BOR CONFIGURATIONS
BOR
Power-on
0
1
0
1
DD
; it then will keep the chip in
below V
BOR
(RCON<6>)
Unavailable
Unavailable
Unavailable
SBOREN
Available
for less than T
Status of
Timer
BOR
PWRT
for greater than
(PWRT)
. If V
BOR disabled; must be enabled by reprogramming the Configuration bits.
BOR enabled by software; operation controlled by SBOREN.
BOR enabled by hardware in Run and Idle modes, disabled during
Sleep mode.
BOR enabled by hardware; must be disabled by reprogramming the
Configuration bits.
BOR
DD
DD
DD
drops
. The
rises
rises
Preliminary
are
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change BOR configuration. It also allows the user to
tailor device power consumption in software by
eliminating the incremental current that the BOR
consumes. While the BOR current is typically very small,
it may have some impact in low-power applications.
21.4.2
When BOR is enabled, the BOR bit always resets to ‘0’
on any BOR or POR event. This makes it difficult to
determine if a BOR event has occurred just by reading
the state of BOR alone. A more reliable method is to
simultaneously check the state of both POR and BOR.
This assumes that the POR and BOR bits are reset to
‘1’ by software immediately after any POR event. If
BOR is ‘0’ while POR is ‘1’, it can be reliably assumed
that a BOR event has occurred.
21.4.3
When BOREN<1:0> = 10, the BOR remains under
hardware
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
Note:
BOR Operation
Even when BOR is under software control,
the BOR Reset voltage level is still set by
the BORV<1:0> Configuration bits. It can-
not be changed by software.
DETECTING BOR
DISABLING BOR IN SLEEP MODE
control
and
 2010 Microchip Technology Inc.
operates
as
previously