PIC12C672-10/SM Microchip Technology, PIC12C672-10/SM Datasheet - Page 215
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PIC12C672-10/SM
Manufacturer Part Number
PIC12C672-10/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-10/SM
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C672-10/SMR
PIC12C672-10/SMR
PIC12C672-10/SMR
- Current page: 215 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
Example 14-4:
;
; The CCP1 interrupt is disabled,
; do polling on the CCP Interrupt flag bit
;
Compare_Event
;
; Compare has occurred
;
CLRF
CLRF
CLRF
CLRF
BSF
BCF
CLRF
BCF
CLRF
MOVLW
MOVWF
BSF
BTFSS
GOTO
BCF
CCP1CON
TMR1H
TMR1L
INTCON
STATUS, RP0
TRISC, CCP1
PIE1
STATUS, RP0
PIR1
0x08
CCP1CON
T1CON, TMR1ON ; Timer1 starts to increment
PIR1, CCP1IF
Compare_Event
PIR1, CCP1IF
Compare Initialization
; CCP Module is off
; Clear Timer1 High byte
; Clear Timer1 Low byte
; Disable interrupts and clear T0IF
; Bank1
; Make CCP pin output if controlling state of pin
; Disable peripheral interrupts
; Bank0
; Clear peripheral interrupts Flags
; Compare mode, set CCP1 pin on match
;
; This needs to be done before next compare
Section 14. CCP
DS31014A-page 14-13
14
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