PIC18F24J11-I/SP Microchip Technology, PIC18F24J11-I/SP Datasheet - Page 408
![IC PIC MCU FLASH 16KB 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F24J11-I/SP
Manufacturer Part Number
PIC18F24J11-I/SP
Description
IC PIC MCU FLASH 16KB 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18F24J11-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Embedded Interface Type
EUSART, I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164329 - MODULE SKT FOR 40DIP 18F45J10
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC18F46J11 FAMILY
TABLE 26-1:
DS39932C-page 408
a
bbb
BSR
C, DC, Z, OV, N
d
dest
f
f
f
GIE
k
label
mm
*
*+
*-
+*
n
PC
PCL
PCH
PCLATH
PCLATU
PD
PRODH
PRODL
s
TBLPTR
TABLAT
TO
TOS
u
WDT
WREG
x
z
z
{
[text]
(text)
[expr]<n>
→
< >
∈
italics
s
d
s
d
}
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit:
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7)
Bank Select Register. Used to select the current RAM bank
ALU Status bits: Carry, Digit Carry, Zero, Overflow, Negative
Destination select bit:
d = 0: store result in WREG
d = 1: store result in file register f
Destination: either the WREG register or the specified register file location
8-bit register file address (00h to FFh), or 2-bit FSR designator (0h to 3h)
12-bit register file address (000h to FFFh). This is the source address
12-bit register file address (000h to FFFh). This is the destination address
Global Interrupt Enable bit
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value)
Label name
The mode of the TBLPTR register for the table read and table write instructions
Used only with table read and table write instructions
No Change to register (such as TBLPTR with table reads and writes)
Post-Increment register (such as TBLPTR with table reads and writes)
Post-Decrement register (such as TBLPTR with table reads and writes)
Pre-Increment register (such as TBLPTR with table reads and writes)
The relative address (2’s complement number) for relative branch instructions or the direct address for
Call/Branch and Return instructions
Program Counter
Program Counter Low Byte
Program Counter High Byte
Program Counter High Byte Latch
Program Counter Upper Byte Latch
Power-Down bit
Product of Multiply High Byte
Product of Multiply Low Byte
Fast Call/Return mode select bit:
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
21-Bit Table Pointer (points to a program memory location)
8-Bit Table Latch
Time-out bit
Top-of-Stack
Unused or Unchanged
Watchdog Timer
Working register (accumulator)
Don’t care (‘0’ or ‘1’). The assembler will generate code with x = 0; it is the recommended form of use for
compatibility with all Microchip software tools
7-bit offset value for Indirect Addressing of register files (source)
7-bit offset value for Indirect Addressing of register files (destination)
Optional argument
Indicates Indexed Addressing
The contents of text
Specifies bit n of the register indicated by the pointer, expr
Assigned to
Register bit field
In the set of
User-defined term (font is Courier New)
Description
© 2009 Microchip Technology Inc.
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