PIC16F913-I/SO Microchip Technology, PIC16F913-I/SO Datasheet - Page 36

• Manufacturer Part Number: PIC16F913-I/SO
• Description: IC PIC MCU FLASH 4KX14 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F913-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SSP/I2C/AUSART/SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F91X
TABLE 3-1:
DS41250B-page 34
LFIOSC
HFIOSC
XT or HS
LP
LP with T1OSC
enabled
EC, RC
EC, RC
System Clock
Source
OSCILLATOR DELAY EXAMPLES
125 kHz-8 MHz
Frequency
4-20 MHz
0-20 MHz
0-20 MHz
31 kHz
32 kHz
32 kHz
INTOSC or Sleep
INTOSC or Sleep
Switching From
LFIOSC
Sleep
Sleep
Sleep
Sleep
Preliminary
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a wake-up from Sleep mode,
10 s internal delay Following a wake-up from Sleep mode
10 s internal delay Following a switch from a LFIOSC or
1024 clock cycles
1024 clock cycles
Oscillator Delay
(T
OST
)
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
Following a change from INTOSC, an
OST of 1024 cycles must occur.
Following a change from INTOSC, an
OST of 1024 cycles must occur. See
Section 3.3.1.1 “Special Case” for
special case conditions.
an internal delay is invoked to allow the
memory bias to stabilize before pro-
gram execution can begin. See
Section 3.3.1.1 “Special Case” for
details about this special case.
or POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
POR, an internal delay is invoked to
allow the memory bias to stabilize
before program execution can begin.
 2004 Microchip Technology Inc.
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