PIC18F44K20-E/P Microchip Technology, PIC18F44K20-E/P Datasheet - Page 39
![IC PIC MCU FLASH 8KX16 40-DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F44K20-E/P
Manufacturer Part Number
PIC18F44K20-E/P
Description
IC PIC MCU FLASH 8KX16 40-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F25K20T-ISS.pdf
(42 pages)
2.PIC18F25K20T-ISS.pdf
(12 pages)
3.PIC18F25K20T-ISS.pdf
(14 pages)
4.PIC18F25K20T-ISS.pdf
(456 pages)
Specifications of PIC18F44K20-E/P
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
64MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F44K20-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
6.0
© 2009 Microchip Technology Inc.
Standard Operating Conditions
Operating Temperature: 25°C is recommended
Param
P12
P13
P14
P15
P16
P17
P18
P19
P20
Note 1:
No.
T
T
T
T
T
T
T
T
T
AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/
VERIFY TEST MODE (CONTINUED)
Sym.
HLD
SET
VALID
SET
DLY
HLD
HLD
HIZ
PPDP
Do not allow excess time when transitioning MCLR between V
executions to occur. The maximum transition time is:
1 T
+ 1.5 μs (for EC mode only) where T
T
sheet for the particular device.
OSC
2
3
8
2
3
4
CY
Input Data Hold Time from MCLR/V
V
Data Out Valid from PGC ↑
PGM ↑ Setup Time to MCLR/V
Delay between Last PGC ↓ and MCLR/V
MCLR/V
MCLR/V
Delay from PGC ↑ to PGD High-Z
Hold time after V
is the oscillator period. For specific values, refer to the Electrical Characteristics section of the device data
+ T
DD
PWRT
↑ Setup Time to MCLR/V
PP
PP
(if enabled) + 1024 T
/RE3 ↓ to V
/RE3 ↓ to PGM ↓
PP
Characteristic
changes
DD
↓
Advance Information
PP
OSC
PP
CY
/RE3 ↑
/RE3 ↑
is the instruction cycle time, T
PP
(for LP, HS, HS/PLL and XT modes only) + 2 ms (for HS/PLL mode only)
/RE3 ↑
PP
/RE3 ↓
PIC18F2XK20/4XK20
Min.
100
10
—
2
2
0
0
3
5
IL
and V
PWRT
IHH
Max.
100
10
—
—
—
—
—
—
—
; this can cause spurious program
is the Power-up Timer period and
Units
nS
μs
ns
ns
μs
ns
μs
s
s
Conditions
DS41297F-page 39