ATMEGA8L-8MU Atmel, ATMEGA8L-8MU Datasheet - Page 62
![IC AVR MCU 8K 8MHZ 3V 32-QFN](/photos/12/13/121317/atmega8l-8mu_sml.jpg)
ATMEGA8L-8MU
Manufacturer Part Number
ATMEGA8L-8MU
Description
IC AVR MCU 8K 8MHZ 3V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8L-8MU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8L-8MU
Manufacturer:
AT
Quantity:
20 000
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ATmega8(L)
• ADC1 – Port C, Bit 1
PC1 can also be used as ADC input Channel 1. Note that ADC input channel 1 uses analog
power.
• ADC0 – Port C, Bit 0
PC0 can also be used as ADC input Channel 0. Note that ADC input channel 0 uses analog
power.
Table 26
Figure 25 on page
Table 26. Overriding Signals for Alternate Functions in PC6..PC4
Table 27. Overriding Signals for Alternate Functions in PC3..PC0
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the Two-wire Serial Interface enables slew-rate controls on the output pins
and
PC4 and PC5. This is not shown in the figure. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module
Table 27
PC6/RESET
RSTDISBL
1
RSTDISBL
0
0
0
RSTDISBL
0
–
RESET INPUT
PC3/ADC3
0
0
0
0
0
0
0
0
–
ADC3 INPUT
56.
relate the alternate functions of Port C to the overriding signals shown in
PC5/SCL/ADC5
TWEN
PORTC5 • PUD
TWEN
SCL_OUT
TWEN
0
0
0
–
ADC5 INPUT / SCL INPUT
PC2/ADC2
0
0
0
0
0
0
0
0
–
ADC2 INPUT
ADC1 INPUT
PC1/ADC1
0
0
0
0
0
0
0
0
–
PC4/SDA/ADC4
TWEN
PORTC4 • PUD
TWEN
SDA_OUT
TWEN
0
0
0
–
ADC4 INPUT / SDA INPUT
(1)
PC0/ADC0
0
0
0
0
0
0
0
0
–
ADC0 INPUT
2486Z–AVR–02/11
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