PIC16F639-I/SS Microchip Technology, PIC16F639-I/SS Datasheet - Page 80
PIC16F639-I/SS
Manufacturer Part Number
PIC16F639-I/SS
Description
IC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC12F635-ISN.pdf
(234 pages)
3.PIC16F636-ISL.pdf
(8 pages)
4.PIC16F636-ISL.pdf
(4 pages)
5.PIC16F639-ISS.pdf
(6 pages)
6.PIC16F676-EP.pdf
(132 pages)
Specifications of PIC16F639-I/SS
Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162066 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC12F635-ISN PDF datasheet #2
- PIC16F636-ISL PDF datasheet #3
- PIC16F636-ISL PDF datasheet #4
- PIC16F639-ISS PDF datasheet #5
- PIC16F676-EP PDF datasheet #6
- Current page: 80 of 234
- Download datasheet (4Mb)
PIC12F635/PIC16F636/639
FIGURE 7-8:
FIGURE 7-9:
DS41232D-page 78
Q1
Q3
C
CxOUT
Set CxIF (level)
CxIF
Q1
Q3
C
CxOUT
Set CxIF (level)
CxIF
IN
Note 1: If a change in the CMCON0 register
IN
+
+
cleared by CMCON0 read
2: When either comparator is first enabled,
(CxOUT) should occur when a read
operation is being executed (start of the
Q2 cycle), then the CxIF of the PIR1
register interrupt flag may not get set.
bias circuitry in the Comparator module
may cause an invalid output from the
comparator until the bias circuitry is stable.
Allow about 1 s for bias settling then clear
the mismatch condition and interrupt flags
before enabling comparator interrupts.
T
T
RT
RT
COMPARATOR
INTERRUPT TIMING W/O
CMCON0 READ
COMPARATOR
INTERRUPT TIMING WITH
CMCON0 READ
reset by software
reset by software
© 2007 Microchip Technology Inc.
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