PIC24FJ16GA002-E/SP Microchip Technology, PIC24FJ16GA002-E/SP Datasheet - Page 12
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PIC24FJ16GA002-E/SP
Manufacturer Part Number
PIC24FJ16GA002-E/SP
Description
IC PIC MCU FLASH 16K 28-SDIP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ16GA002-E/SP
Core Size
16-Bit
Program Memory Size
16KB (5.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
4096Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, SPI, USART
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SPDIP
Device Core
PIC
Family Name
PIC24
Maximum Speed
32 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164337 - MODULE SOCKET FOR PM3 40DIPDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC24FJXXXGA0XX
3.0
ICSP mode is a special programming protocol that
allows you to read and write to PIC24FJXXXGA0XX
device family memory. The ICSP mode is the most
direct method used to program the device; note, how-
ever, that Enhanced ICSP is faster. ICSP mode also
has the ability to read the contents of executive
memory to determine if the programming executive is
present. This capability is accomplished by applying
control codes and instructions, serially to the device,
using pins, PGCx and PGDx.
In ICSP mode, the system clock is taken from the
PGCx pin, regardless of the device’s oscillator Config-
uration bits. All instructions are shifted serially into an
internal buffer, then loaded into the Instruction Register
(IR) and executed. No program fetching occurs from
internal memory. Instructions are fed in 24 bits at a
time. PGDx is used to shift data in and PGCx is used
as both the serial shift clock and the CPU execution
clock.
3.1
Figure 3-1 shows the high-level overview of the
programming process. After entering ICSP mode, the
first action is to Chip Erase the device. Next, the code
memory is programmed, followed by the device
Configuration registers. Code memory (including the
Configuration registers) is then verified to ensure that
programming was successful. Then, program the
code-protect Configuration bits, if required.
DS39768D-page 12
Note:
DEVICE PROGRAMMING – ICSP
Overview of the Programming
Process
During ICSP operation, the operating
frequency of PGCx must not exceed
10 MHz.
FIGURE 3-1:
3.2
Upon entry into ICSP mode, the CPU is Idle. Execution
of the CPU is governed by an internal state machine. A
4-bit control code is clocked in using PGCx and PGDx,
and this control code is used to command the CPU (see
Table 3-1).
The SIX control code is used to send instructions to the
CPU for execution, and the REGOUT control code is
used to read data out of the device via the VISI register.
TABLE 3-1:
0000b
0001b
0010b-1111b N/A
Control Code
4-Bit
ICSP Operation
Program Configuration Bits
Verify Configuration Bits
SIX
REGOUT
Mnemonic
CPU CONTROL CODES IN
ICSP™ MODE
Program Memory
Verify Program
Enter ICSP™
Perform Chip
HIGH-LEVEL ICSP™
PROGRAMMING FLOW
Exit ICSP
© 2008 Microchip Technology Inc.
Erase
Done
Start
Shift in 24-bit instruction
and execute.
Shift out the VISI (0784h)
register.
Reserved.
Description