PIC18F2321-I/SP Microchip Technology, PIC18F2321-I/SP Datasheet - Page 3

• Manufacturer Part Number: PIC18F2321-I/SP
• Description: IC PIC MCU FLASH 4KX16 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2321-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Height: 3.3 mm
• Length: 34.67 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Silicon Errata Issues
1. Module: 10-Bit Analog-to-Digital
 2010 Microchip Technology Inc.
Note:
When the AD clock source is selected as 2 T
or RC (when ADCS<2:0 = 000 or x11), in
extremely rare cases, the E
Error) and E
exceed
codes 511 and 512.
Work around
Select the AD clock source as 4 T
16 T
selecting 2 T
Affected Silicon Revisions
B2
X
OSC
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B3).
B3
, 32 T
X
the
Converter (A/D)
DL
OSC
(Differential Linearity Error) may
OSC
data
or RC.
or 64 T
sheet
IL
(Integral Linearity
OSC
specification
OSC
and avoid
, 8 T
PIC18F2221/2321/4221/4321
OSC
OSC
at
,
2. Module: Master Synchronous Serial Port
When configured for I
MSSP module may not receive the correct data, in
extremely rare cases. This occurs only if the Serial
Receive/Transmit Buffer Register (SSPBUF) is
not read within a window after the SSPIF interrupt
(PIR1<3>) has occurred.
Work around
The issue can be resolved in either of these ways:
• Prior to the I
• Each time the SSPIF is set, read the SSPBUF
Affected Silicon Revisions
B2
clock stretching feature.
This
(SSPCON2<0>).
before the first rising clock edge of the next byte
being received.
X
B3
X
is
(MSSP)
done
2
C slave reception, enable the
by
2
C™ slave reception, the
setting
DS80285C-page 3
the
SEN
bit