DSPIC33FJ06GS202-I/SP Microchip Technology, DSPIC33FJ06GS202-I/SP Datasheet - Page 12

• Manufacturer Part Number: DSPIC33FJ06GS202-I/SP
• Description: IC DSPIC MCU/DSP 6K 28-DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ06GS202-I/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 6KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

32. Module: High Speed PWM
EXAMPLE 3:
DS80439H-page 12
TRISAbits.TRISA4 = 1;
TRISAbits.TRISA3 = 1;
IOCON1bits.PENH = 0;
IOCON1bits.PENL = 0;
IOCON1bits.OVRDAT = 0;
IOCON1bits.OVRENH = 1;
IOCON1bits.OVRENL = 1;
PTCONbits.PTEN = 1;
IOCON1bits.OVRENH = 0;
IOCON1bits.OVRENL = 0;
IOCON1bits.PENH = 1;
IOCON1bits.PENL = 1;
The PENH and PENL bits in the IOCONx register
are used to assign ownership of the pins to either
the PWM module or the GPIO module. The correct
procedure to configure the PWM module is to first
assign pin ownership to the PWM module and then
enabling it using the PTEN bit in the PTCON
register.
If the PWM module is enabled using the above
sequence, then a glitch may be observed on the
PWM pins before actual switching of the PWM
outputs begins. This glitch may cause momentary
turn ON of power MOSFETs that are driven by the
PWM pins and may cause damage to the
application hardware.
Work around
Follow the given sequence to avoid any glitches
from appearing on the PWM outputs at the time of
enabling.
1. Configure the respective PWM pins to digital
inputs using the TRISx registers. This step will
put the PWM pins in a high-impedance state.
The PWM outputs must be maintained in a safe
state by using pull-up or pull-down resistors.
CONFIGURE PWM MODULE TO PREVENT GLITCHES ON PWM1H AND PWM1L
PINS AT THE TIME OF ENABLING
// Configure PWM1H/RA4 as digital input
// Ensure output is in safe state using pull-up or
// pull-down resistors
// Configure PWM1L/RA3 as digital input
// Ensure output is in safe state using pull-up or
// pull-down resistors
// Assign pin ownership of PWM1H/RA4 to GPIO module
// Assign pin ownership of PWM1L/RA3 to GPIO module
// Configure override state of the PWM outputs to
// desired safe state.
// Override PWM1H output
// Override PWM1L output
// Enable PWM module
// Remove override for PWM1H output
// Remove override for PWM1L output
// Assign pin ownership of PWM1H/RA4 to PWM module
// Assign pin ownership of PWM1L/RA3 to PWM module
The code
around.
2. Assign pin ownership to the GPIO module by
3. Specify the PWM override state to the desired
4. Override
5. Enable
6. Remove the PWM Overrides by making
7. Assign pin ownership to the PWM module by
Affected Silicon Revisions
A2
X
OVRDAT<1:0> bit-field in the IOCONx register.
configuring IOCONx<PENH> = 0
IOCONx<PENL> = 0.
safe state for the PWM pins using the
IOCONx<OVRENH> = 1
IOCONx<OVRENL> = 1.
PTCON<PTEN> = 1.
IOCONx<OVRENH>
IOCONx<OVRENL> = 0.
setting
IOCONx<PENL> = 1.
Example 3
A3
X
the
A4
IOCONx<PENH>
the
X
illustrates the use of this work
© 2010 Microchip Technology Inc.
PWM
PWM
module
outputs
=
=
by
0
by
1
setting
setting
and
and
and
and