DSPIC30F2010-20I/MM Microchip Technology, DSPIC30F2010-20I/MM Datasheet - Page 5
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DSPIC30F2010-20I/MM
Manufacturer Part Number
DSPIC30F2010-20I/MM
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2010-20ISO.pdf
(202 pages)
3.DSPIC30F2010-20ISO.pdf
(18 pages)
4.DSPIC30F2010-20ISO.pdf
(6 pages)
5.DSPIC30F2010-20ISO.pdf
(26 pages)
6.DSPIC30F2010-20IMM.pdf
(204 pages)
Specifications of DSPIC30F2010-20I/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2010-20I/MMG
DSPIC30F201020IMM
DSPIC30F201020IMM
DSPIC30F201020IMM
DSPIC30F201020IMM
Silicon Errata Issues
1. Module: CPU
EXAMPLE 1:
© 2010 Microchip Technology Inc.
Note:
When an instruction that writes to a location in the
address range of Y data memory (addresses
between 0x0900 and 0x09FF) is immediately
followed by a MAC-type DSP instruction that reads
a location also resident in Y data memory, the two
operations will not be executed as specified. This
is demonstrated in
MOV
MOV
MOV
MAC
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A4).
#0x090A, W0
#0x09B0, W10
W2, [W0++]
W4*W5, A, [W10]+=2, W5 ;Perform
INCORRECT RESULTS
Example
;Load address > =
;0x900 into W0
;Load address >=
;0x900 into W10
;Perform indirect
;write via W0 to
;address >= 0x900
;read operation
;using Y-AGU
1.
EXAMPLE 2:
Work arounds
Work around 1:
Insert a NOP between the two instructions as
shown in
Work around 2:
If Work around 1 is not feasible due to real-time
application constraints, the user may take
precautions to ensure that a write operation
performed on a location in Y data memory is not
immediately
instruction that performs a read operation of a
location in Y data memory.
Affected Silicon Revisions
MOV
MOV
MOV
NOP
MAC
A0
X
A1
X
Example
#0x090A, W0
#0x09B0, W10
W2, [W0++]
W4*W5, A, [W10]+=2, W5 ;Perform
dsPIC30F2010
A2
followed
X
CORRECT RESULTS
2.
A3
X
by
A4
X
;Load address > =
;0x900 into W0
;Load address >=
;0x900 into W10
;Perform indirect
;write via W0 to
;address >= 0x900
;No operation
;read operation
;using Y-AGU
a
DS80451E-page 5
DSP
MAC-type