PIC18F67J11-I/PT Microchip Technology, PIC18F67J11-I/PT Datasheet - Page 26
![IC PIC MCU FLASH 64KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67J11-I/PT
Manufacturer Part Number
PIC18F67J11-I/PT
Description
IC PIC MCU FLASH 64KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.DV164136.pdf
(448 pages)
3.DV164136.pdf
(4 pages)
4.PIC18F63J11-IPT.pdf
(36 pages)
5.PIC18F66J11-IPT.pdf
(4 pages)
6.PIC18F66J11-IPT.pdf
(4 pages)
7.PIC18F66J11-IPT.pdf
(20 pages)
Specifications of PIC18F67J11-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F67J11-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- DV164136 PDF datasheet #2
- DV164136 PDF datasheet #3
- PIC18F63J11-IPT PDF datasheet #4
- PIC18F66J11-IPT PDF datasheet #5
- PIC18F66J11-IPT PDF datasheet #6
- PIC18F66J11-IPT PDF datasheet #7
- Current page: 26 of 448
- Download datasheet (8Mb)
PIC18F87J11 FAMILY
TABLE 1-4:
DS39778D-page 26
RD0/AD0/PMD0
RD1/AD1/PMD1
RD2/AD2/PMD2
RD3/AD3/PMD3
RD4/AD4/PMD4/SDO2
RD5/AD5/PMD5/
SDI2/SDA2
RD6/AD6/PMD6/
SCK2/SCL2
RD7/AD7/PMD7/SS2
Legend: TTL = TTL compatible input
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
RD0
AD0
PMD0
RD1
AD1
PMD1
RD2
AD2
PMD2
RD3
AD3
PMD3
RD4
AD4
PMD4
SDO2
RD5
AD5
PMD5
SDI2
SDA2
RD6
AD6
PMD6
SCK2
SCL2
RD7
AD7
PMD7
SS2
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).
(6)
(6)
(6)
(6)
(6)
(6)
(6)
(6)
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
= Input
= Power
PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
80-TQFP
72
69
68
67
66
65
64
63
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
PORTD is a bidirectional I/O port.
Digital I/O.
External memory address/data 0.
Parallel Master Port data.
Digital I/O.
External memory address/data 1.
Parallel Master Port data.
Digital I/O.
External memory address/data 2.
Parallel Master Port data.
Digital I/O.
External memory address/data 3.
Parallel Master Port data.
Digital I/O.
External memory address/data 4.
Parallel Master Port data.
SPI data out.
Digital I/O.
External memory address/data 5.
Parallel Master Port data.
SPI data in.
I
Digital I/O.
External memory address/data 6.
Parallel Master Port data.
Synchronous serial clock input/output for SPI mode.
Synchronous serial clock input/output for I
Digital I/O.
External memory address/data 7.
Parallel Master Port data.
SPI slave select input.
2
C™ data I/O.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
© 2009 Microchip Technology Inc.
DD
2
C mode.
)
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