PIC16C63A-04/SO Microchip Technology, PIC16C63A-04/SO Datasheet - Page 29

IC MCU OTP 4KX14 PWM 28SOIC

PIC16C63A-04/SO

Manufacturer Part Number
PIC16C63A-04/SO
Description
IC MCU OTP 4KX14 PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C63A-04/SO

Program Memory Type
OTP
Program Memory Size
7KB (4K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
0 C
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
4 MHz
Data Rom Size
192 B
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.65 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C63A-04/SO
Manufacturer:
MICRCHI
Quantity:
1 000
Part Number:
PIC16C63A-04/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.0
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
5.1
PORTA is a 6-bit latch.
The RA4/T0CKI pin is a Schmitt Trigger input and an
open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All pins have
data direction bits (TRIS registers), which can config-
ure these pins as output or input.
Setting a TRISA register bit puts the corresponding out-
put driver in a hi-impedance mode. Clearing a bit in the
TRISA register puts the contents of the output latch on
the selected pin(s).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, the value is modified and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin.
On the PIC16C73B/74B, PORTA pins are multiplexed
with analog inputs and analog V
tion of each pin is selected by clearing/setting the con-
trol bits in the ADCON1 register (A/D Control
Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 5-1:
BCF
CLRF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
2000 Microchip Technology Inc.
I/O PORTS
PORTA and TRISA Registers
STATUS, RP0
PORTA
STATUS, RP0
0x06
ADCON1
0xCF
TRISA
On all RESETS, pins with analog functions
are configured as analog and digital inputs.
INITIALIZING PORTA
(PIC16C73B/74B)
;
; Initialize PORTA by
; clearing output
; data latches
; Select Bank 1
; Configure all pins
; as digital inputs
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
; TRISA<7:6> are always
; read as ’0’.
REF
input. The opera-
PIC16C63A/65B/73B/74B
FIGURE 5-1:
FIGURE 5-2:
Note 1: I/O pins have protection diodes to V
Data
Bus
WR
Port
WR
TRIS
RD Port
To A/D Converter
Note 1: I/O pins have protection diodes to V
WR
TRIS
Data
Bus
WR
Port
RD Port
TMR0 Clock Input
TRIS Latch
D
Data Latch
D
CK
CK
TRIS Latch
Data Latch
D
D
CK
CK
RD TRIS
Q
Q
Q
Q
RD TRIS
Q
Q
Q
Q
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
BLOCK DIAGRAM OF
RA4/T0CKI PIN
Q
Q
EN
Schmitt
Trigger
Input
Buffer
Analog
Input
mode
EN
EN
D
DS30605C-page 29
D
V
N
SS
V
V
P
N
SS
DD
DD
DD
I/O pin
and V
I/O pin
TTL
Input
Buffer
and V
(1)
SS
SS
(1)
.
.

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