DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 35

• Manufacturer Part Number: DSPIC30F3012-20I/SO
• Description: IC DSPIC MCU/DSP 24K 18SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301220ISO

3.2
The core has two data spaces. The data spaces can be
considered
instructions), or as one unified linear address range (for
MCU instructions). The data spaces are accessed
using two Address Generation Units (AGUs) and
separate data paths.
3.2.1
The data space memory is split into two blocks, X and
Y data space. A key element of this architecture is that
Y space is a subset of X space, and is fully contained
within X space. In order to provide an apparent Linear
Addressing space, X and Y spaces have contiguous
addresses.
FIGURE 3-7:
© 2008 Microchip Technology Inc.
Data Address Space
DATA SPACE MEMORY MAP
2 Kbyte
SFR Space
Optionally
Mapped
into Program
Memory
1 Kbyte
SRAM Space
either
dsPIC30F2011/2012 DATA SPACE MEMORY MAP
separate
Address
MSB
0x1FFF
0x0001
0x07FF
0x0801
0x09FF
0x0A01
0x0BFF
0x0C01
0x8001
0xFFFF
(for
dsPIC30F2011/2012/3012/3013
some
MSB
Unimplemented (X)
DSP
Y Data RAM (Y)
X Data RAM (X)
16 bits
SFR Space
X Data
When executing any instruction other than one of the
MAC class of instructions, the X block consists of the
64-Kbyte data address space (including all Y
addresses). When executing one of the MAC class of
instructions, the X block consists of the 64-Kbyte data
address space, excluding the Y address block (for data
reads only). In other words, all other instructions regard
the entire data memory as one composite address
space. The MAC class instructions extract the
Y address space from data space and address it using
EAs sourced from W10 and W11. The remaining X data
space is addressed using W8 and W9. Both address
spaces are concurrently accessed only with the MAC
class instructions.
The data space memory map for the dsPIC30F2011
and dsPIC30F2012 is shown in Figure 3-7. The data
space memory map for the dsPIC30F3012 and
dsPIC30F3013 is shown in Figure 3-8.
LSB
0x0000
0x07FE
0x0800
0x09FE
0x0A00
0x0BFE
0x0C00
0x1FFE
0x8000
0xFFFE
Address
LSB
8 Kbyte
Near
Data
Space
DS70139F-page 35