PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 10
![IC PIC MCU FLASH 4KX16 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6310-I/PT
Manufacturer Part Number
PIC18LF6310-I/PT
Description
IC PIC MCU FLASH 4KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
7.PIC18F8410-IPT.pdf
(404 pages)
Specifications of PIC18LF6310-I/PT
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
54
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6310-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F8410/8490/8493 FAMILY
2.6
The PGC pin is used as a clock input pin and the PGD
pin is used for entering command bits and data
input/output during serial operation. Commands and
data are transmitted on the rising edge of PGC, latched
on the falling edge of PGC and are Least Significant bit
(LSb) first.
2.6.1
All instructions are 20 bits, consisting of a leading 4-bit
command, followed by a 16-bit operand, which
depends on the type of command being executed. To
input a command, PGC is cycled four times. The
commands needed for programming and verification
are shown in Table 2-3.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Table 2-4. The 4-bit
command is shown MSb first. The command operand,
or “Data Payload”, is shown <MSB><LSB>. Figure 2-9
demonstrates how to serially present a 20-bit
command/operand to the device.
2.6.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers as appropriate for use with other commands.
FIGURE 2-9:
DS39624C-page 10
PGC
PGD
Serial Program/Verify Operation
4-BIT COMMANDS
CORE INSTRUCTION
P3
4-Bit Command
1
P2
1
2
P4
0
TABLE WRITE, POST-INCREMENT TIMING (1101)
3
1
4
1
P2A
P5
P2B
1
0
2
0
0
3
0
4
0
5
0
6
PGD = Input
0
16-Bit Data Payload
4
7
1
8
0
9
TABLE 2-3
TABLE 2-4
0
Core Instruction
(Shift in16-bit instruction)
Shift out TABLAT register
Table Read
Table Read, post-increment
Table Read, post-decrement
Table Read, pre-increment
Table Write
Table Write, post-increment by 2
Table Write, post-decrement by 2
Table Write, start programming
Command
10
1101
0
4-Bit
C
11
1
12
1
13
Description
1
Payload
3C 40
Data
14
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
1
3
15
0
© 2007 Microchip Technology Inc.
16
0
Table Write,
post-increment by 2
P5A
Fetch Next 4-Bit Command
Core Instruction
1
n
2
n
3
n
Command
4
n
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111
4-Bit