DSPIC33FJ32GP302-I/SO Microchip Technology, DSPIC33FJ32GP302-I/SO Datasheet - Page 233
![IC DSPIC MCU/DSP 32K 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
DSPIC33FJ32GP302-I/SO
Manufacturer Part Number
DSPIC33FJ32GP302-I/SO
Description
IC DSPIC MCU/DSP 32K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
4.DSPIC33FJ32GP204-IPT.pdf
(270 pages)
Specifications of DSPIC33FJ32GP302-I/SO
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx10-bit|10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- DSPIC33FJ32GP204-IPT PDF datasheet #4
- Current page: 233 of 412
- Download datasheet (6Mb)
REGISTER 19-11: CiFEN1: ECAN™ ACCEPTANCE FILTER ENABLE REGISTER
REGISTER 19-12: CiBUFPNT1: ECAN™ FILTER 0-3 BUFFER POINTER REGISTER
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
FLTEN15
FLTEN7
R/W-1
R/W-1
R/W-0
R/W-0
FLTENn: Enable Filter n to Accept Messages bits
1 = Enable Filter n
0 = Disable Filter n
F3BP<3:0>: RX Buffer mask for Filter 3
1111 = Filter hits received in RX FIFO buffer
1110 = Filter hits received in RX Buffer 14
•
•
•
0001 = Filter hits received in RX Buffer 1
0000 = Filter hits received in RX Buffer 0
F2BP<3:0>: RX Buffer mask for Filter 2 (same values as bit 15-12)
F1BP<3:0>: RX Buffer mask for Filter 1 (same values as bit 15-12)
F0BP<3:0>: RX Buffer mask for Filter 0 (same values as bit 15-12)
FLTEN14
FLTEN6
R/W-1
R/W-1
R/W-0
R/W-0
F3BP<3:0>
F1BP<3:0>
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
FLTEN13
FLTEN5
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN12
FLTEN4
R/W-1
R/W-1
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FLTEN11
FLTEN3
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN10
FLTEN2
R/W-1
R/W-1
R/W-0
R/W-0
F2BP<3:0>
F0BP<3:0>
x = Bit is unknown
x = Bit is unknown
FLTEN9
FLTEN1
R/W-1
R/W-1
R/W-0
R/W-0
DS70292E-page 233
FLTEN8
FLTEN0
R/W-1
R/W-1
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0
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