PIC16C63A-20/SS Microchip Technology, PIC16C63A-20/SS Datasheet - Page 96
![IC MCU OTP 4KX14 PWM 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16C63A-20/SS
Manufacturer Part Number
PIC16C63A-20/SS
Description
IC MCU OTP 4KX14 PWM 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C63A-04SP.pdf
(184 pages)
2.PIC16C63A-04SP.pdf
(7 pages)
3.PIC16C63A-04SP.pdf
(10 pages)
4.PIC16C63A-04SP.pdf
(10 pages)
Specifications of PIC16C63A-20/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOP309-1025 - ADAPTER 28-SSOP TO 28-DIPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C63A-20/SS
Manufacturer:
IR
Quantity:
500
Part Number:
PIC16C63A-20/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16C63A-04SP PDF datasheet
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- PIC16C63A-04SP PDF datasheet #3
- PIC16C63A-04SP PDF datasheet #4
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- Download datasheet (3Mb)
PIC16C63A/65B/73B/74B
13.7.2
It should also be taken into account that under worst
case conditions (V
max. WDT prescaler), it may take several seconds
before a WDT time-out occurs.
FIGURE 13-6:
TABLE 13-7:
DS30605C-page 96
2007h
81h
Legend: Shaded cells are not used by the Watchdog Timer.
Note 1: See Register 13-1 for operation of these bits.
Address
Note:
Note: PSA and PS2:PS0 are bits in the OPTION register.
When a CLRWDT instruction is executed
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but the
prescaler assignment is not changed.
WDT PROGRAMMING
CONSIDERATIONS
Config. bits
OPTION_REG
Name
SUMMARY OF WATCHDOG TIMER REGISTERS
DD
= Min., Temperature = Max., and
WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
Enable Bit
WDT
RBPU
Bit 7
From TMR0 Clock Source
(Figure 6-1)
–
BODEN
INTEDG
Bit 6
0
1
(1)
PSA
M
U
X
T0CS
Bit 5
CP1
T0SE
Bit 4
CP0
0
Time-out
8 - to - 1 MUX
MUX
WDT
Postscaler
PWRTE
1
Bit 3
PSA
8
(1)
PSA
To TMR0 MUX (Figure 6-1)
WDTE
Bit 2
PS2
2000 Microchip Technology Inc.
PS2:PS0
FOSC1
Bit 1
PS1
FOSC0
Bit 0
PS0
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