PIC16C63A-20I/SP Microchip Technology, PIC16C63A-20I/SP Datasheet - Page 27

• Manufacturer Part Number: PIC16C63A-20I/SP
• Description: IC MCU OTP 4KX14 PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C63A-20I/SP

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 192 B
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 8
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4.5
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = ’0’) will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-4.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-2.
FIGURE 4-4:
Note 1: For register file map detail, see Figure 4-2.
2000 Microchip Technology Inc.
RP1:RP0
bank select
0
2: Shaded portions are not implemented; maintain the IRP and RP1 bits clear.
Indirect Addressing, INDF and
FSR Registers
location select
6
Direct Addressing
Data
Memory
DIRECT/INDIRECT ADDRESSING
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
PIC16C63A/65B/73B/74B
100h
17Fh
Bank 2
10
not used
EXAMPLE 4-2:
NEXT
CONTINUE
Note:
180h
1FFh
Bank 3
11
Maintain the IRP and RP1 bits clear.
IRP
movlw
movwf
clrf
incf
btfss
goto
:
0
bank select
7
0x20
FSR
INDF
FSR,F
FSR,4
NEXT
Indirect Addressing
INDIRECT ADDRESSING
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR register
DS30605C-page 27
location select
0