PIC32MX420F032H-40I/MR Microchip Technology, PIC32MX420F032H-40I/MR Datasheet - Page 105

IC PIC MCU FLASH 32KX32 64-QFN

PIC32MX420F032H-40I/MR

Manufacturer Part Number
PIC32MX420F032H-40I/MR
Description
IC PIC MCU FLASH 32KX32 64-QFN
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX420F032H-40I/MR

Core Size
32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
MIPS32® M4K™
Speed
40MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC32
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI, USB
No. Of Pwm Channels
5
Embedded Interface Type
EUSART, I2C, SPI, USB
Rohs Compliant
Yes
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, JTAG, SPI, TWI, UART, USB
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
14.0
This family of PIC32MX devices features four
synchronous 16-bit timers (default) that can operate as
a free-running interval timer for various timing applica-
tions and counting external events. The following
modes are supported:
• Synchronous Internal 16-bit Timer
• Synchronous Internal 16-bit Gated Timer
• Synchronous External 16-bit Timer
FIGURE 14-1:
© 2010 Microchip Technology Inc.
Note 1: ADC event trigger is available on Timer3 only.
Note 1: This data sheet summarizes the features of
2: TxCK pins not available on 64-pin devices.
TxCK
Trigger
ADC Event
2: Some registers and associated bits
TxIF
Event Flag
TIMERS 2, 3, 4, 5
the PIC32MX3XX/4XX family of devices.
It is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 14. “Timers” (DS61105) of the
“PIC32MX Family Reference Manual”,
which is available from the Microchip web
site (www.microchip.com/PIC32).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
(2)
(1)
TGATE (TxCON<7>)
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
0
1
Reset
Equal
Comparator x 16
TMRx
PRx
Q
Q
PBCLK
Gate
Sync
D
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous Internal 32-bit Timer
• Synchronous Internal 32-bit Gated Timer
• Synchronous External 32-bit Timer
14.1
• Selectable clock prescaler
• Timers operational during CPU Idle
• Time base for input capture and output compare
• ADC event trigger (Timer3 only)
• Fast bit manipulation using CLR, SET and INV
Note:
modules (Timer2 and Timer3 only)
registers
PIC32MX3XX/4XX
Additional Supported Features
1 0
0 0
x 1
Throughout this chapter, references to
registers TxCON, TMRx and PRx use ‘x’
to represent Timer2 through 5 in 16-bit
modes. In 32-bit modes, ‘x’ represents
Timer2 or 4; ‘y’ represents Timer3 or 5.
TCKPS (TxCON<6:4>)
TGATE (TxCON<7>)
TCS (TxCON<1>)
ON (TxCON<15>)
1, 2, 4, 8, 16,
32, 64, 256
Prescaler
Sync
DS61143G-page 105
3

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