PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 95

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

REGISTER 7-1:
© 2006 Microchip Technology Inc.
Upper Byte:
bit 15
bit 15
bit 14-12 COSC2:COSC0: Current Oscillator Selection bits
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC2:NOSC0: New Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
CLKLOCK: Clock Selection Lock Enabled bit
If FSCM is enabled (FCKSM1 = 1):
1 = Clock and PLL selections are locked
0 = Clock and PLL selections are not locked and may be modified by setting the OSWEN bit
If FSCM is disabled (FCKSM1 = 0):
Clock and PLL selections are never locked and may be modified by setting the OSWEN bit.
Unimplemented: Read as ‘0’
LOCK: PLL Lock Status bit
1 = PLL module is in lock or PLL module start-up timer is satisfied
0 = PLL module is out of lock, PLL start-up timer is running or PLL is disabled
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit
1 = FSCM has detected a clock failure
0 = No clock failure has been detected
Unimplemented: Read as ‘0’
SOSCEN: 32 kHz Secondary Oscillator (SOSC) Enable bit
1 = Enable secondary oscillator
0 = Disable secondary oscillator
OSWEN: Oscillator Switch Enable bit
1 = Initiate an oscillator switch to clock source specified by NOSC2:NOSC0 bits
0 = Oscillator switch is complete
Legend:
R = Readable bit
-n = Value at POR
Note 1: Reset values for these bits are determined by the FNOSC Configuration bits.
COSC2
R-0
Lower Byte:
bit 7
CLKLOCK
2: Also resets to ‘0’ during any valid clock switch, or whenever a non-PLL Clock mode is selected.
R/SO-0
OSCCON: OSCILLATOR CONTROL REGISTER
COSC1
R-0
U-0
—
COSC0
R-0
U = Unimplemented bit, read as ‘0’
W = Writable bit
‘1’ = Bit is set
LOCK
R-0
(2)
Preliminary
U-0
—
PIC24FJ128GA FAMILY
U-0
—
R/W-x
NOSC2
CO = Clear-Only bit
‘0’ = Bit is cleared
R/CO-0
(1)
CF
R/W-x
NOSC1
(1)
U-0
—
R/W-x
NOSC0
SO = Set-Only bit
x = Bit is unknown
SOSCEN
bit 8
(1)
R/W-0
DS39747C-page 93
OSWEN
R/W-0
bit 0