PIC24HJ64GP506A-I/PT Microchip Technology, PIC24HJ64GP506A-I/PT Datasheet - Page 76
![IC PIC MCU FLASH 64KB 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24HJ64GP506A-I/PT
Manufacturer Part Number
PIC24HJ64GP506A-I/PT
Description
IC PIC MCU FLASH 64KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ64GP206A-IMR.pdf
(304 pages)
3.PIC24HJ64GP206A-IMR.pdf
(10 pages)
Specifications of PIC24HJ64GP506A-I/PT
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
53
Ram Memory Size
8KB
Cpu Speed
40MHz
No. Of Timers
9
Interface
CAN, I2C, SPI, UART
Embedded Interface Type
CAN, I2C, SPI, UART
Rohs Compliant
Yes
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8192 B
Interface Type
SPI, I2C, UART
Maximum Clock Frequency
7.37 MHz
Number Of Timers
13
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24HJ64GP506A-I/PT
Manufacturer:
Microchip
Quantity:
252
Company:
Part Number:
PIC24HJ64GP506A-I/PT
Manufacturer:
MICROCHIP
Quantity:
717
Company:
Part Number:
PIC24HJ64GP506A-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE D-1:
DS70152H-page 76
PIC24HJ128GP210A
PIC24HJ128GP306A
PIC24HJ128GP310A
PIC24HJ128GP506A
PIC24HJ128GP510A
dsPIC33FJ256GP506A
dsPIC33FJ256GP510A
dsPIC33FJ256GP710A
dsPIC33FJ256MC510A
dsPIC33FJ256MC710A
PIC24HJ256GP206A
Item Description:
SUM(a:b) = Byte sum of locations a to b inclusive (all 3 bytes of code memory)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0x0F) + (FICD & 0xE3))
(for dsPIC33FJ06GS101/102/202 and dsPIC33FJ16GS402/404/502/504 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0xF7) + (FICD & 0xE3))
(for dsPIC33FJ12GP201/202, dsPIC33FJ12MC201/202, PIC24HJ12GP201/202, dsPIC33FJ32GP202/204,
dsPIC33FJ32MC202/204, PIC24HJ32GP202/204, dsPIC33FJ16GP304, dsPIC33FJ16MC304, PIC24HJ16GP304,
dsPIC33FJ32GP302/304, dsPIC33FJ32MC302/304 and PIC24HJ32GP302/304 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0x87) + (FOSC & 0xE7) + (FWDT & 0xDF) + (FPOR & 0xF7) + (FICD & 0xE3))
(for dsPIC33FJ64GP202/204, dsPIC33F64MC202/204, PIC24HJ64GP202/204, dsPIC33FJ64GP802/804,
dsPIC33FJ64MC802/804, PIC24HJ64GP502/504, dsPIC33FJ128GP202/204, dsPIC33FJ128MC202/204,
PIC24HJ128GP202/204, dsPIC33FJ128GP802/804, dsPIC33FJ128MC802/804 and PIC24HJ128GP502/504 devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0xA7) + (FOSC & 0xC7) + (FWDT & 0xDF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for dsPIC33FJXXXGPX06/X08/X10, dsPIC33FJ64GPX06A/X08A/X10A, dsPIC33FJ128GPX06A/X08A/X10A,
dsPIC33FJXXXMCX06/X08/X10, dsPIC33FJ64MCX06A/X08A/X10A, dsPIC33FJ128MCX06A/X08A/X10A,
PIC24HJXXXGPX06/X08/X10, PIC24HJ64GPX06A/X08A/X10A and PIC24HJ128GPX06A/X08A/X10A devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0xCF) + (FSS & 0xCF) + (FGS & 0x07) +
(FOSCSEL & 0xA7) + (FOSC & 0xC7) + (FWDT & 0xFF) + (FPOR & 0xE7) + (FICD & 0xE3))
(for dsPIC33FJ256GP506A/510A/710A, dsPIC33FJ256MC510A/710A and PIC24HJ256GP206A/210A/610A devices)
CFGB = Configuration Block (masked) = Byte sum of ((FBS & 0x0F) + (FGS & 0x07) + (FOSCSEL & 0x87) +
(FOSC & 0xC7) + (FWDT & 0xDF) + (FPOR & 0x67) + (FICD & 0xE3))
(for dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610 devices)
Device
CHECKSUM COMPUTATION (CONTINUED)
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Read Code
Protection
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB + SUM(0:0157FF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
CFGB +SUM(0:02ABFF)
CFGB
Checksum Computation
0x03DC
0x03DC
0x03DC
0x03DC
0x03DC
0x03DC
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x01BC
0x05BA
0x05DA
0x05DA
0x05DA
0x05DA
0x05DA
0x05DA
Erased
Value
© 2010 Microchip Technology Inc.
0xAAAAAA at 0x0
Code Address
Value with
and Last
0xFFDE
0xFFBE
0x05BA
0xFFBE
0x05BA
0xFFBE
0x05BA
0x05BA
0xFFBE
0x05BA
0x01DE
0x05DA
0x01DE
0x05DA
0x01DE
0x05DA
0x01DE
0x05DA
0x01DE
0x05DA
0x01DE
0x05DA