PIC18F8490-I/PT Microchip Technology, PIC18F8490-I/PT Datasheet - Page 56
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F8490-I/PT
Manufacturer Part Number
PIC18F8490-I/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F6310-IPT.pdf
(28 pages)
3.PIC18F6390-IPT.pdf
(414 pages)
4.PIC18F6390-IPT.pdf
(16 pages)
5.PIC18F6390-IPT.pdf
(12 pages)
6.PIC18F6390-IPT.pdf
(6 pages)
7.PIC18F6390-IPT.pdf
(4 pages)
8.PIC18F8490-IPT.pdf
(412 pages)
Specifications of PIC18F8490-I/PT
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/EUSART/AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
Minimum Operating Temperature
- 25 C
On-chip Adc
12-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8490-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8490-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F6310-IPT PDF datasheet #2
- PIC18F6390-IPT PDF datasheet #3
- PIC18F6390-IPT PDF datasheet #4
- PIC18F6390-IPT PDF datasheet #5
- PIC18F6390-IPT PDF datasheet #6
- PIC18F6390-IPT PDF datasheet #7
- PIC18F8490-IPT PDF datasheet #8
- Current page: 56 of 412
- Download datasheet (8Mb)
PIC18F6390/6490/8390/8490
4.4
PIC18F6390/6490/8390/8490 devices implement a
BOR circuit that provides the user with a number of
configuration and power saving options. The BOR is
controlled
BOREN1:BOREN0 configuration bits. There are a total
of four BOR configurations, which are summarized in
Table 4-1.
The BOR threshold is set by the BORV1:BORV0 bits. If
BOR is enabled (any values of BOREN1:BOREN0
except ‘00’), any drop of V
D005) for greater than T
the device. A Reset may or may not occur if V
below V
Brown-out Reset until V
If the Power-up Timer is enabled, it will be invoked after
V
Reset
(parameter 33). If V
Power-up Timer is running, the chip will go back into a
Brown-out Reset and the Power-up Timer will be
initialized. Once V
Timer will execute the additional time delay.
BOR
independently configured. Enabling the BOR Reset
does not automatically enable the PWRT.
4.4.1
When BOREN1:BOREN0 = 01, the BOR can be
enabled or disabled by the user in software. This is
done with the control bit, SBOREN (RCON<6>).
Setting SBOREN enables the BOR to function as
previously described. Clearing SBOREN disables the
BOR entirely. The SBOREN bit operates only in this
mode; otherwise it is read as ‘0’.
TABLE 4-1:
DS39629B-page 54
DD
BOREN1
BOR Configuration
rises above V
0
0
1
1
and
BOR
for
Brown-out Reset (BOR)
SOFTWARE ENABLED BOR
for less than T
an
the
by
BOREN0
BOR CONFIGURATIONS
DD
additional
Power-up
BOR
0
1
0
1
DD
rises above V
the
; it then will keep the chip in
DD
drops below V
BOR
BOR
rises above V
DD
(RCON<6>)
Unavailable
Unavailable
Unavailable
(parameter 35) will reset
BORV1:BORV0
SBOREN
below V
Available
Status of
. The chip will remain in
time
Timer
BOR
delay,
BOR
, the Power-up
BOR
(PWRT)
BOR
(parameter
BOR is disabled; must be enabled by reprogramming the configuration
bits.
BOR is enabled in software; operation controlled by SBOREN.
BOR is enabled in hardware and active during the Run and Idle modes,
disabled during Sleep mode.
BOR is enabled in hardware; must be disabled by reprogramming the
configuration bits.
.
while the
DD
T
PWRT
falls
and
Preliminary
are
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change the BOR configuration. It also allows the user
to tailor device power consumption in software by
eliminating the incremental current that the BOR
consumes. While the BOR current is typically very
small, it may have some impact in low-power
applications.
4.4.2
When BOR is enabled, the BOR bit always resets to ‘0’
on any BOR or POR event. This makes it difficult to
determine if a BOR event has occurred just by reading
the state of BOR alone. A more reliable method is to
simultaneously check the state of both POR and BOR.
This assumes that the POR bit is reset to ‘1’ in software
immediately after any POR event. IF BOR is ‘0’ while
POR is ‘1’, it can be reliably assumed that a BOR event
has occurred.
4.4.3
When BOREN1:BOREN0 = 10, the BOR remains
under hardware control and operates as previously
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
Note:
BOR Operation
Even when BOR is under software control,
the BOR Reset voltage level is still set by
the BORV1:BORV0 configuration bits. It
cannot be changed in software.
DETECTING BOR
DISABLING BOR IN SLEEP MODE
2004 Microchip Technology Inc.
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