PIC18F4431-I/PT Microchip Technology, PIC18F4431-I/PT Datasheet - Page 2

• Manufacturer Part Number: PIC18F4431-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
4. Module: PCPWM
5. Module: PCPWM
6. Module: PCPWM
DS80192C-page 2
If dead-time insertion is enabled and it is a non-
zero value, glitches in the PWM output will occur
under the following conditions:
1. When the PWM timer is stopped by clearing
2. When the duty cycle is changed to zero.
Work around
1. Before disabling the PWM timer, ensure that
2. Do not use zero duty cycle when dead-time
Date Codes that pertain to this issue:
All engineering and production devices.
The PTMRH register will read as ‘00’ or the last
value written to it, even though the upper four bits
of the PWM timer may be different. Writing to
PTMRH will effect the upper four bits of the PWM
timer when PTMRL is subsequently written.
Although the PWM timer operates correctly, the
double-buffer circuit does not transfer data to the
PTMRH register from the upper four bits of the
PWM timer.
Work around
PWM operation is not affected. Do not attempt to
read PTMRH.
Date Codes that pertain to this issue:
All engineering and production devices.
In Complementary mode with dead-time insertion,
when using OVDCOND and OVDCONS to
override the PWM outputs, dead time is not
inserted correctly when the dead-time prescaler is
F
Work around
None. Use dead-time prescaler of F
circumstances.
Date Codes that pertain to this issue:
All engineering and production devices.
OSC
the PTEN bit.
PORTB is set up to maintain a safe state of
external hardware and that TRISB is set up to
define the pins as outputs.
insertion is enabled. Instead of zero, set the
duty cycle to a small, non-zero value (such as
‘1’).
/4, F
OSC
/8 or F
OSC
/16.
OSC
/2 in these
7. Module: Core (DAW Instruction)
EXAMPLE 1:
8. Module: EUSART
9. Module: EUSART
MOVLW
ADDLW
BTFSC
INCFSZ byte2
DAW
BTFSC
INCFSZ byte2
This is repeated for each DAW instruction.
The DAW instruction may improperly clear the
Carry bit (STATUS<0>) when executed.
Work around
Test the Carry bit state before executing the DAW
instruction. If the Carry bit is set, increment the
next higher byte to be added, using an instruction
such as INCFSZ (this instruction does not affect
any Status flags and will not overflow a BCD
nibble). After the DAW instruction has been
executed, process the Carry bit normally (see
Example 1).
Date Codes that pertain to this issue:
All engineering and production devices.
Bit SENDB in the TXSTA register is not automati-
cally cleared by hardware upon completion of
transmission of a Sync Break.
Work around
Check the TRMT bit in TXSTA. If the TRMT bit is
set, Break transmission is said to be complete.
If the transmitter is left enabled while the module is
performing an auto-baud operation, an arbitrary
data byte may get transmitted.
Work around
Clear TXEN bit (TXSTA<5>) before any auto-baud
operation and set it after auto-baud is complete.
Enable TXEN only when a data byte is to be
transmitted. Care must be taken to ensure that the
TX pin is pulled high, either through an external
resistor, or by making the TX pin an output and
writing ‘1’ to it, to not disturb the transmit line.
0x80
0x80
STATUS, C
STATUS, C
PROCESSING THE CARRY
BIT DURING BCD ADDITIONS
© 2005 Microchip Technology Inc.
; .80 (BCD)
; .80 (BCD)
; test C
; inc next higher LSB
; test C
; inc next higher LSB