PIC18LF4331-I/PT Microchip Technology, PIC18LF4331-I/PT Datasheet - Page 180
![IC PIC MCU FLASH 4KX16 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18LF4331-I/PT
Manufacturer Part Number
PIC18LF4331-I/PT
Description
IC PIC MCU FLASH 4KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(4 pages)
8.PIC18LF2331-ISO.pdf
(40 pages)
Specifications of PIC18LF4331-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC18LF4331-I/PTR
PIC18LF4331-I/PTR
PIC18LF4331-I/PTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4331-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18LF2331-ISO PDF datasheet #8
- Current page: 180 of 392
- Download datasheet (4Mb)
PIC18F2331/2431/4331/4431
REGISTER 18-4:
18.3.1
In the Free-Running mode, the PWM Time Base regis-
ters (PTMRL and PTMRH) will begin counting upwards
until the value in the PWM Time Base Period register,
PTPER (PTPERL and PTPERH), is matched. The
PTMR registers will be reset on the following input
clock edge and the time base will continue counting
upwards as long as the PTEN bit remains set.
18.3.2
In the Single-Shot mode, the PWM time base will begin
counting upwards when the PTEN bit is set. When the
value in the PTMR register matches the PTPER regis-
ter, the PTMR register will be reset on the following
input clock edge and the PTEN bit will be cleared by the
hardware to halt the time base.
18.3.3
In Continuous Up/Down Count modes, the PWM time
base counts upwards until the value in the PTPER
register matches with the PTMR register. On the
following
downwards. The PTDIR bit in the PTCON1 register is
read-only and indicates the counting direction. The
PTDIR bit is set when the timer counts downwards.
DS39616D-page 180
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
SEVOPS3
R/W-0
input
FREE-RUNNING MODE
SINGLE-SHOT MODE
CONTINUOUS UP/DOWN COUNT
MODES
SEVOPS<3:0>: PWM Special Event Trigger Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
.
.
.
1111 = 1:16 Postscale
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting downwards
0 = A Special Event Trigger will occur when the PWM time base is counting upwards
Unimplemented: Read as ‘0’
UDIS: PWM Update Disable bit
1 = Updates from Duty Cycle and Period Buffer registers are disabled
0 = Updates from Duty Cycle and Period Buffer registers are enabled
OSYNC: PWM Output Override Synchronization bit
1 = Output overrides via the OVDCON register are synchronized to the PWM time base
0 = Output overrides via the OVDCON register are asynchronous
SEVOPS2
R/W-0
clock
PWMCON1: PWM CONTROL REGISTER 1
edge,
W = Writable bit
‘1’ = Bit is set
SEVOPS1
R/W-0
the
timer
SEVOPS0
R/W-0
counts
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SEVTDIR
R/W-0
18.3.4
The input clock to PTMR (F
options of 1:1, 1:4, 1:16 or 1:64. These are selected by
control bits, PTCKPS<1:0>, in the PTCON0 register.
The prescaler counter is cleared when any of the
following occurs:
• Write to the PTMR register
• Write to the PTCON (PTCON0 or PTCON1)
• Any device Reset
Note:
register
Note:
Since the PWM compare outputs are
driven to the active state when the PWM
time base is counting downwards and
matches the duty cycle value, the PWM
outputs are held inactive during the first
half of the first period of the Continuous
Up/Down Count mode until PTMR begins
to count down from the PTPER value.
PWM TIME BASE PRESCALER
The PTMR register is not cleared when
PTCONx is written.
U-0
—
2010 Microchip Technology Inc.
x = Bit is unknown
R/W-0
UDIS
OSC
/4) has prescaler
OSYNC
R/W-0
bit 0
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