PIC16F877A-I/P Microchip Technology, PIC16F877A-I/P Datasheet - Page 266
![IC MCU FLASH 8KX14 EE 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16F877A-I/P
Manufacturer Part Number
PIC16F877A-I/P
Description
IC MCU FLASH 8KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F877A-I/P
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
CCP/I2C/MSSP/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC16F877AI/P
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- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 266 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
DS31016A-page 16-16
The SSP module has five registers for I
• SSP Control Register (SSPCON)
• SSP Status Register (SSPSTAT)
• Serial Receive/Transmit Buffer (SSPBUF)
• SSP Shift Register (SSPSR) - Not directly accessible
• SSP Address Register (SSPADD)
The SSPCON register allows control of the I
(SSPCON<3:0>) allow one of the following I
• I
• I
• I
• I
• I
Before selecting any I
the appropriate TRIS bits. Selecting an I
and SDA pins to be used as the clock and data lines in I
The SSPSTAT register gives the status of the data transfer. This information includes detection
of a START or STOP bit, specifies if the received byte was data or address, if the next byte is the
completion of 10-bit address, and if this will be a read or write data transfer. The SSPSTAT reg-
ister is read only.
The SSPBUF is the register to which transfer data is written to or read from. The SSPSR register
shifts the data in or out of the device. In receive operations, the SSPBUF and SSPSR create a
doubled buffered receiver. This allows reception of the next byte to begin before reading the last
byte of received data. When the complete byte is received, it is transferred to the SSPBUF reg-
ister and the SSPIF flag bit is set. If another complete byte is received before the SSPBUF reg-
ister is read, a receiver overflow has occurred and bit SSPOV (SSPCON<6>) is set.
The SSPADD register holds the slave address. In 10-bit mode, the user needs to write the high
byte of the address (1111 0 A9 A8 0). Following the high byte address match, the low byte of
the address needs to be loaded (A7:A0).
enabled)
enabled)
2
2
2
2
2
C Slave mode (7-bit address)
C Slave mode (10-bit address)
C Firmware controlled Multi-Master mode, 7-bit address (start and stop bit interrupts
C Firmware controlled Multi-Master mode, 10-bit address (start and stop bit interrupts
C Firmware controlled Master mode, slave is idle
2
C mode, the SCL and SDA pins must be programmed to inputs by setting
2
C operation. They are:
2
C mode, by setting the SSPEN bit, enables the SCL
2
C modes to be selected:
2
C operation. Four mode selection bits
2
C mode.
1997 Microchip Technology Inc.
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