ATMEGA16-16MU Atmel, ATMEGA16-16MU Datasheet - Page 57

IC AVR MCU 16K 16MHZ 5V 44-QFN

ATMEGA16-16MU

Manufacturer Part Number
ATMEGA16-16MU
Description
IC AVR MCU 16K 16MHZ 5V 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA16-16MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
JTAG/SPI/UART
Total Internal Ram Size
1KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
MLF
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Package
44MLF
Family Name
ATmega
Maximum Speed
16 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Special Function I/O
Register – SFIOR
Alternate Functions of
Port A
2466T–AVR–07/10
• Bit 2 – PUD: Pull-up disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 51
Port A has an alternate function as analog input for the ADC as shown in
A pins are configured as outputs, it is essential that these do not switch when a conversion is in
progress. This might corrupt the result of the conversion.
Table 22. Port A Pins Alternate Functions
Table 23
Figure 26 on page
Table 23. Overriding Signals for Alternate Functions in PA7..PA4
Bit
Read/Write
Initial Value
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Port Pin
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
and
ADTS2
R/W
Table 24
7
0
Alternate Function
ADC7 (ADC input channel 7)
ADC6 (ADC input channel 6)
ADC5 (ADC input channel 5)
ADC4 (ADC input channel 4)
ADC3 (ADC input channel 3)
ADC2 (ADC input channel 2)
ADC1 (ADC input channel 1)
ADC0 (ADC input channel 0)
PA7/ADC7
55.
ADC7 INPUT
ADTS1
R/W
relate the alternate functions of Port A to the overriding signals shown in
6
0
0
0
0
0
0
0
0
0
for more details about this feature.
ADTS0
R/W
5
0
PA6/ADC6
ADC6 INPUT
R
4
0
0
0
0
0
0
0
0
0
ACME
R/W
3
0
PA5/ADC5
ADC5 INPUT
PUD
R/W
2
0
0
0
0
0
0
0
0
0
PSR2
R/W
1
0
ATmega16(L)
PA4/ADC4
PSR10
ADC4 INPUT
R/W
Table
0
0
0
0
0
0
0
0
0
0
22. If some Port
SFIOR
“Con-
57

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