PIC18F2525-I/SP Microchip Technology, PIC18F2525-I/SP Datasheet - Page 21
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PIC18F2525-I/SP
Manufacturer Part Number
PIC18F2525-I/SP
Description
IC MCU FLASH 24KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
7.PIC18LF4620-IP.pdf
(390 pages)
Specifications of PIC18F2525-I/SP
Program Memory Type
FLASH
Program Memory Size
48KB (24K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2525-I/SP
Manufacturer:
SANYO
Quantity:
4 000
TABLE 3-7:
2010 Microchip Technology Inc.
Step 1: Direct access to data EEPROM.
Step 2: Set the data EEPROM Address Pointer.
Step 3: Load the data to be written.
Step 4: Enable memory writes.
Step 5: Initiate write.
Step 6: Poll WR bit, repeat until the bit is clear.
Step 7: Hold PGC low for time P10.
Step 8: Disable writes.
Repeat Steps 2 through 8 to write more data.
Note 1: See
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
0000
4-Bit
Figure 4-4
9E A6
9C A6
0E <Addr>
6E A9
OE <AddrH>
6E AA
0E <Data>
6E A8
84 A6
82 A6
50 A6
6E F5
00 00
<MSB><LSB>
94 A6
PROGRAMMING DATA MEMORY
Data Payload
for details on shift out data timing.
BCF
BCF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
MOVF
MOVWF
NOP
Shift out data
BCF
PIC18F2XXX/4XXX FAMILY
EECON1, EEPGD
EECON1, CFGS
<Addr>
EEADR
<AddrH>
EEADRH
<Data>
EEDATA
EECON1, WREN
EECON1, WR
EECON1, W, 0
TABLAT
EECON1, WREN
(1)
Core Instruction
DS39622L-page 21