DSPIC30F4013-30I/PT Microchip Technology, DSPIC30F4013-30I/PT Datasheet - Page 24

• Manufacturer Part Number: DSPIC30F4013-30I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-30I/PT

• Program Memory Type: FLASH
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401330IPT

dsPIC30F
2.3
There are 8 types of instruction flows:
1.
FIGURE 2-2:
2.
FIGURE 2-3:
DS70082G-page 22
1. MOV.b #0x55,W0
2. MOV.b #0x35,W1
3. ADD.b W0,W1,W2
1. MOV #0x55,W0
2. BTSC W1,#3
3. ADD W0,W1,W2
4. BRA SUB_1
5. SUB W0,W1,W3
6. Instruction @ address SUB_1
Normal one-word, one-cycle instructions: these
instructions take one effective cycle to execute,
as shown in Figure 2-2.
One-word, two-cycle (or three-cycle) instruc-
tions that are flow control instructions: these
instructions include the relative branches, rela-
tive call, skips and returns. When an instruction
changes the PC (other than to increment it), the
pipeline fetch is discarded. This causes the
instruction to take two effective cycles to exe-
cute as shown in Figure 2-3. Some instructions
that change program flow require 3 cycles, such
as the RETURN, RETFIE and RETLW instruc-
tions, and instructions that skip over 2-word
instructions.
Instruction Flow
INSTRUCTION PIPELINE FLOW: 1-WORD, 1-CYCLE
INSTRUCTION PIPELINE FLOW: 1-WORD, 2-CYCLE
Fetch 1
Fetch 1
T
T
CY
CY
0
0
Execute 1
Fetch 2
Execute 1
Fetch 2
T
T
CY
CY
1
1
Preliminary
Execute 2
Fetch 3
Execute 2
Skip Taken
Fetch 3
T
T
CY
CY
2
2
Execute 3
Flush
Fetch 4
T
T
CY
CY
3
3
Execute 4
Fetch 5
T
T
 2004 Microchip Technology Inc.
CY
CY
4
4
Flush
Fetch SUB_1
T
T
CY
CY
5
5