PIC18F8493-I/PT Microchip Technology, PIC18F8493-I/PT Datasheet - Page 2
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PIC18F8493-I/PT
Manufacturer Part Number
PIC18F8493-I/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6393-IPT.pdf
(62 pages)
2.PIC18F6393-IPT.pdf
(8 pages)
3.PIC18F6393-IPT.pdf
(58 pages)
Specifications of PIC18F8493-I/PT
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
AUSART, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163030
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163030 - KIT DEV PICDEM LCD2XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
MAXIM
Quantity:
872
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8493-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F6393/6493/8393/8493
TABLE 2:
DS80347B-page 2
MSSP
MSSP
MSSP
MSSP
MSSP
Note 1:
Module
Only those issues indicated in the last column apply to the current silicon revision.
SPI
SPI
I
I
I
2
2
2
C™
C
C
Feature
SILICON ISSUE SUMMARY
Number
Item
1.
2.
3.
4.
5.
In SPI Slave mode, the MSSP will generate a
write collision if SSPBUF is updated and that
register’s contents have not been transferred
to the shift register.
A flag, collision detect and indicator bit are not
reset when the SPI module is disabled.
In 10-Bit Slave mode, the I
work correctly.
The MSSP may not receive the correct data if
there is a delay in reading SSPBUF after an
SSPIF interrupt.
When the module is configured for the I
Master mode and the device is operating below
3V, the I
2
C transmission will not work correctly.
Issue Summary
2
C mode does not
2
C
2009 Microchip Technology Inc.
C0
X
X
X
X
X
Affected Revisions
C1
X
X
X
X
(1)