PIC18F8493-I/PT Microchip Technology, PIC18F8493-I/PT Datasheet - Page 40
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PIC18F8493-I/PT
Manufacturer Part Number
PIC18F8493-I/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6393-IPT.pdf
(62 pages)
2.PIC18F6393-IPT.pdf
(8 pages)
3.PIC18F6393-IPT.pdf
(58 pages)
Specifications of PIC18F8493-I/PT
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
Number Of I /o
66
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
66
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
AUSART, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163030
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM163030 - KIT DEV PICDEM LCD2XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
MAXIM
Quantity:
872
Company:
Part Number:
PIC18F8493-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F8493-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F6393/6493/8393/8493
2.8
An A/D conversion can be started by the Special Event
Trigger of the ECCP2 module. This requires that the
CCP2M<3:0> bits (CCP2CON<3:0>) be programmed
as ‘1011’ and that the A/D module is enabled (ADON
bit is set). When the trigger occurs, the GO/DONE bit
will be set, starting the A/D acquisition and conversion,
and the Timer1 (or Timer3) counter will be reset to zero.
Timer1 (or Timer3) is reset to automatically repeat the
A/D acquisition period with minimal software overhead
(moving ADRESH:ADRESL to the desired location).
TABLE 2-2:
DS39896C-page 40
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
TRISA
TRISF
TRISH
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1:
Name
2:
3:
(2)
Use of the ECCP2 Trigger
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
These registers are not implemented on 64-pin devices.
For these Reset values, see the “PIC18F6390/6490/8390/8490 Data Sheet” (DS39629).
GIE/GIEH PEIE/GIEL TMR0IE
A/D Result Register High Byte
A/D Result Register Low Byte
TRISA7
OSCFIF
OSCFIE
OSCFIP
TRISH7
TRISF7
ADFM
Bit 7
—
—
—
—
—
REGISTERS ASSOCIATED WITH A/D OPERATION
(1)
TRISA6
TRISH6
TRISF6
CMIE
CMIP
CMIF
ADIF
ADIE
ADIP
Bit 6
—
—
—
(1)
TRISA5
TRISH5
VCFG1
ACQT2
TRISF5
RC1IE
RC1IP
RC1IF
CHS3
Bit 5
—
—
—
TRISH4
TRISA4
TRISF4
VCFG0
ACQT1
INT0IE
TX1IE
TX1IP
TX1IF
CHS2
Bit 4
—
—
—
TRISH3
SSP1IF
SSP1IE
SSP1IP
BCL1IF
BCL1IE
BCL1IP
TRISA3
TRISF3
PCFG3
ACQT0
CHS1
The appropriate analog input channel must be selected
and the minimum acquisition period is either timed by
the user, or an appropriate T
the Special Event Trigger sets the GO/DONE bit (starts
a conversion).
If the A/D module is not enabled (ADON is cleared), the
Special Event Trigger will be ignored by the A/D module,
but will still reset the Timer1 (or Timer3) counter.
RBIE
Bit 3
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISH2
HLVDIF
HLVDIE
HLVDIP
TRISA2
TRISF2
PCFG2
ADCS2
CHS0
Bit 2
GO/DONE
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISH1
TRISA1
TRISF1
PCFG1
ADCS1
INT0IF
Bit 1
2010 Microchip Technology Inc.
ACQ
time selected before
TMR1IF
TMR1IE
TMR1IP
CCP2IF
CCP2IE
CCP2IP
TRISH0
TRISA0
TRISF0
PCFG0
ADCS0
ADON
RBIF
Bit 0
Values
Reset
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)