PIC18C242-I/SP Microchip Technology, PIC18C242-I/SP Datasheet - Page 32

IC MCU OTP 8KX16 A/D 28DIP

PIC18C242-I/SP

Manufacturer Part Number
PIC18C242-I/SP
Description
IC MCU OTP 8KX16 A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C242-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Number Of I /o
22
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
23
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
MSSP, SPI, I2C, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3DB18C452 - BOARD DAUGHTER ICEPIC3
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18CXX2
TABLE 3-3:
DS39026C-page 30
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
CCP1CON
CCP2CON
ADRESH
ADCON0
ADCON1
CCPR1H
CCPR2H
Register
ADRESL
CCPR1L
CCPR2L
RCREG
TMR3H
SPBRG
TXREG
TMR3L
T3CON
RCSTA
TXSTA
IPR2
PIR2
IPR1
PIR1
PIE2
PIE1
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
4: See Table 3-2 for RESET value for specific condition.
5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other
6: The long write enable is only reset on a POR or MCLR Reset.
7: Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read as ’0’.
vector (0008h or 0018h).
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hard-
ware stack.
oscillator modes, they are disabled and read ’0’.
242
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242
242
242
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242
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242
242
242
242
242
242
242
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242
242
242
242
242
Applicable Devices
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
442
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
252
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
452
Brown-out Reset
Power-on Reset,
xxxx xxxx
xxxx xxxx
0000 0000
--0- 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 -01x
0000 000x
---- 1111
---- 0000
---- 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
RESET Instruction
MCLR Resets
Stack Resets
uuuu uuuu
uuuu uuuu
0000 0000
--0- 0000
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
uuuu uuuu
--00 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 -01u
0000 000u
---- 1111
---- 0000
---- 0000
1111 1111
-111 1111
0000 0000
-000 0000
0000 0000
-000 0000
WDT Reset
2001 Microchip Technology Inc.
Wake-up via WDT
uuuu uuuu
uuuu uuuu
uuuu uuuu
--u- uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
---- uuuu
---- uuuu
---- uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
uuuu uuuu
-uuu uuuu
or Interrupt
(1)
(1)
(1)

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