DSPIC30F4013-30I/P Microchip Technology, DSPIC30F4013-30I/P Datasheet - Page 6
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DSPIC30F4013-30I/P
Manufacturer Part Number
DSPIC30F4013-30I/P
Description
IC DSPIC MCU/DSP 48K 40DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20IP.pdf
(26 pages)
2.DSPIC30F3014-30IPT.pdf
(228 pages)
3.DSPIC30F3014-30IPT.pdf
(16 pages)
4.DSPIC30F3014-30IPT.pdf
(6 pages)
5.DSPIC30F3014-30IPT.pdf
(14 pages)
6.DSPIC30F3014-30IPT.pdf
(20 pages)
7.DSPIC30F3014-30IP.pdf
(244 pages)
Specifications of DSPIC30F4013-30I/P
Program Memory Type
FLASH
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Data Rom Size
1024 B
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F003 - MODULE SOCKET DSPIC30F 40DIPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F4013-30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F4013-30I/P
Manufacturer:
Microchip
Quantity:
3 183
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DSPIC30F4013-30I/P
Manufacturer:
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Quantity:
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MICROCHIP
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Manufacturer:
Microchip Technology
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dsPIC30F3014/4013
4. Module: Interrupt Controller
EXAMPLE 4:
EXAMPLE 6:
DS80455D-page 6
.include "p30fxxxx.inc"
...
DISI #4 ; protect the disable
; of INT1
BCLR IEC1, #INT1IE ; disable interrupt 1
... ; next instruction
;protected by DISI
// Note: Macros defined in device include files
#define SET_AND_SAVE_CPU_IPL (save_to, ipl){ \
save_to = SRbits.IPL; \
SET_CPU_IPL (ipl); } (void) 0;
#define RESTORE_CPU_IPL (saved_to) SET_CPU_IPL (saved_to)
#include "p30fxxxx.h"
. . .
int save_to;
SET_AND_SAVE_CPU_IPL (save_to, 3)
. . .
RESTORE_CPU_IPL (save_to)
The following sequence of events will lead to an
address
“Interrupt 1” is used to represent any enabled
dsPIC30F interrupt.
1. User software performs one of the following
2. Interrupt 1 occurs between 2 and 4 instruction
Work arounds
Work around 1: For Assembly Language
Source Code
The user may disable interrupt nesting, disable
interrupts before modifying the Interrupt 1 set-
ting or execute a DISI instruction before modi-
fying the CPU IPL or Interrupt 1. A minimum
DISI value of 4 is required if the DISI instruction
is executed immediately before the CPU IPL or
Interrupt 1 is modified, as shown in Example 4.
It is necessary to have DISI active for four cycles
after the CPU IPL or Interrupt 1 is modified.
operations:
-
-
-
-
cycles after any of the operations listed above.
CPU IPL is raised to Interrupt 1 IPL
level or higher, or
Interrupt 1 IPL is lowered to CPU IPL
level or lower, or
Interrupt 1 is disabled (Interrupt 1 IE
bit set to ‘0’), or
Interrupt 1 flag is cleared
error
USING DISI
USING SET_AND_SAVE_CPU_IPL AND RESTORE_CPU_IPL MACROS
trap.
The
generic
term
EXAMPLE 5:
// Note: Macro defined in device include
// files
#define SET_CPU_IPL (ipl){ \
int DISI_save; \
\
DISI_save = DISICNT; \
asm volatile ("disi #0x3FFF");\
SRbits.IPL = ipl; \
__builtin_nop();
__builtin_nop();
DISICNT = DISI_save; } (void) 0;
#include "p30fxxxx.h"
. . .
SET_CPU_IPL (3)
. . .
Work around 2: For C Language Source Code
For applications using the C language, MPLAB
C30 versions 1.32 and higher provide several
macros for modifying the CPU IPL. The
SET_CPU_IPL macro provides the ability to
safely modify the CPU IPL, as shown in
Example 5.
There is one level of DISI, so this macro saves
and restores the DISI state. For temporarily
modifying and restoring the CPU IPL, the mac-
ros
RESTORE_CPU_IPL can be used, as shown in
Example 6. These macros also make use of the
SET_CPU_IPL macro.
SET_AND_SAVE_CPU_IPL
USING SET_CPU_IPL
MACRO
\
\
© 2010 Microchip Technology Inc.
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