DSPIC30F4013-30I/P Microchip Technology, DSPIC30F4013-30I/P Datasheet - Page 14

• Manufacturer Part Number: DSPIC30F4013-30I/P
• Description: IC DSPIC MCU/DSP 48K 40DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-30I/P

• Program Memory Type: FLASH
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F003 - MODULE SOCKET DSPIC30F 40DIPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F4013-30IP

dsPIC30F Family Reference Manual
Figure 35-5:
DS70272B-page 35-14
Note 1: Operation for 8-bit mode is shown; the 16-bit mode is similar.
SS1
SCK1
(CKP = 0
CKE = 0)
SCK1
(CKP = 1
CKE = 0)
SPITBF
SDO1
SDI1
(SMP = 0)
Input
Sample
(SMP = 0)
SPI1IF
SPIRBF
(2)
2: When the SSEN (SPI1CON1<7>) bit is set to ‘1’, the SS1 pin must be driven low to enable transmission and
3: Transmit data is held in SPI1TXB and SPITBF remains set until all bits are transmitted.
(3)
User application
writes to SPI1BUF
reception in Slave mode.
SPI1 Slave Mode Timing (Slave Select Pin Enabled)
SPI1BUF
to
SPI1SR
bit 7
bit 7
bit 6
bit 5
bit 4
bit 3
(1)
bit 2
SPI1SR to
SPI1BUF
bit 1
© 2008 Microchip Technology Inc.
User application
reads SPI1BUF
bit 0
bit 0
1 instruction
cycle latency