DSPIC30F4013-20I/P Microchip Technology, DSPIC30F4013-20I/P Datasheet - Page 154

• Manufacturer Part Number: DSPIC30F4013-20I/P
• Description: IC DSPIC MCU/DSP 48K 40DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20I/P

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F003 - MODULE SOCKET DSPIC30F 40DIPACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F4013-20IP

TABLE 20-7:
TABLE 20-8:
RCON
OSCCON
OSCTUN
PMD1
PMD2
Note
FOSC
FWDT
FBORPOR
FGS
File Name
Name
SFR
1:
2:
3:
4:
1:
Addr.
0740
0742
0744
0770
0772
Reset state depends on type of Reset.
Reset state depends on Configuration bits.
For the dsPIC30F3014 device, the DCIMD, T4MD, T5MD, OC3MD, OC4,MD, IC7MD and IC8MD bits do not perform any function.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
F80000
F80002
F80004
F8000A
Addr.
TRAPR IOPUWR BGST
IC8MD
Bit 15
T5MD
SYSTEM INTEGRATION REGISTER MAP
DEVICE CONFIGURATION REGISTER MAP
—
—
Bits 23-16
IC7MD
Bit 14
T4MD
—
—
—
—
—
COSC<2:0>
Bit 13
T3MD
—
—
FWDTEN
MCLREN
Bit 15
FCKSM<1:0>
—
LVDEN
Bit 12
T2MD
—
—
Bit 14
Bit 11
T1MD
—
—
—
—
—
—
Bit 13
Bit 10
—
—
—
—
—
—
—
LVDL<3:0>
NOSC<2:0>
Bit 12
IC2MD
—
—
—
—
Bit 9
—
—
Bit 11
DCIMD
IC1MD
—
—
—
—
Bit 8
—
I2CMD
EXTR
Bit 10
Bit 7
—
—
POST<1:0>
—
—
—
FOS<2:0>
U2MD
SWR
Bit 6
—
—
Bit 9
—
—
—
SWDTEN
U1MD
LOCK
Bit 5
—
—
Bit 8
—
—
—
WDTO
BOREN
Bit 4
—
—
—
—
Bit 7
—
—
—
SPI1MD
OC4MD OC3MD
SLEEP
TUN3
Bit 3
CF
Bit 6
—
—
—
—
TUN2
Bit 2
IDLE
—
—
Bit 5
FWPSA<1:0>
BORV<1:0>
—
—
LPOSCEN OSWEN
OC2MD
C1MD
TUN1
Bit 1
BOR
Bit 4
—
ADCMD 0000 0000 0000 0000
OC1MD 0000 0000 0000 0000
Bit 3
TUN0
Bit 0
POR
—
—
FPR<4:0>
Bit 2
0000 0000 0000 0000
FWPSB<3:0>
—
—
Reset State
Bit 1
GCP
(Note 1)
(Note 2)
FPWRT<1:0>
GWRP
Bit 0