PIC16F876-20/SP Microchip Technology, PIC16F876-20/SP Datasheet - Page 202
![IC MCU FLASH 8KX14 EE 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16F876-20/SP
Manufacturer Part Number
PIC16F876-20/SP
Description
IC MCU FLASH 8KX14 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F876-20/SP
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP/PSP/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
5-ch x 10-bit
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
5
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F876-20/SP
Manufacturer:
MICROCHIP
Quantity:
6 264
Part Number:
PIC16F876-20/SP
Manufacturer:
MIC
Quantity:
20 000
PIC16F87X
CCP. See Capture/Compare/PWM
CCP1CON .......................................................................... 17
CCP2CON .......................................................................... 17
CCPR1H Register .................................................. 15, 17, 57
CCPR1L Register ......................................................... 17, 57
CCPR2H Register ........................................................ 15, 17
CCPR2L Register ......................................................... 15, 17
CCPxM0 bit ........................................................................ 58
CCPxM1 bit ........................................................................ 58
CCPxM2 bit ........................................................................ 58
CCPxM3 bit ........................................................................ 58
CCPxX bit ........................................................................... 58
CCPxY bit ........................................................................... 58
CKE .................................................................................... 66
CKP .................................................................................... 67
Clock Polarity Select bit, CKP ............................................ 67
Code Examples
Code Protected Operation
Code Protection ....................................................... 119, 133
Computed GOTO ............................................................... 26
Configuration Bits ............................................................. 119
Configuration Word .......................................................... 120
Conversion Considerations .............................................. 198
D
D/A ..................................................................................... 66
Data EEPROM ................................................................... 41
Data Memory ...................................................................... 12
Data/Address bit, D/A ......................................................... 66
DC and AC Characteristics Graphs and Tables ............... 177
DC Characteristics
Development Support ...................................................... 143
Device Differences ........................................................... 197
Device Overview .................................................................. 5
Direct Addressing ............................................................... 27
DS30292C-page 200
PWM Mode ................................................................ 61
Special Event Trigger and A/D Conversions .............. 60
Call of a Subroutine in Page 1 from Page 0 ............... 26
EEPROM Data Read ................................................. 43
EEPROM Data Write .................................................. 43
FLASH Program Read ............................................... 44
FLASH Program Write ............................................... 45
Indirect Addressing .................................................... 27
Initializing PORTA ...................................................... 29
Saving STATUS, W and PCLATH Registers ........... 130
Data EEPROM and FLASH Program Memory ........... 45
Associated Registers ................................................. 46
Code Protection ......................................................... 45
Reading ...................................................................... 43
Special Functions Registers ....................................... 41
Spurious Write Protection .......................................... 45
Write Verify ................................................................. 45
Writing to .................................................................... 43
Bank Select (RP1:RP0 Bits) ................................. 12, 18
General Purpose Registers ........................................ 12
Register File Map ................................................. 13, 14
Special Function Registers ........................................ 15
Commercial and Industrial ............................... 152–156
Extended .......................................................... 157–160
Block Diagram .................................................... 61
Duty Cycle .......................................................... 61
Example Frequencies/Resolutions (Table) ........ 62
PWM Period ....................................................... 61
E
Electrical Characteristics .................................................. 149
Errata ................................................................................... 4
External Clock Input (RA4/T0CKI). See Timer0
External Interrupt Input (RB0/INT). See Interrupt Sources
F
Firmware Instructions ....................................................... 135
FLASH Program Memory ................................................... 41
FSR Register .................................................... 15, 16, 17, 27
G
General Call Address Sequence ........................................ 76
General Call Address Support ........................................... 76
General Call Enable bit ...................................................... 68
I
I/O Ports ............................................................................. 29
I
I
I
I
I
I
2
2
2
2
2
2
C ...................................................................................... 73
C Bus
C Master Mode Reception ............................................... 84
C Master Mode Repeated START Condition .................. 81
C Mode Selection ............................................................ 73
C Module
Associated Registers ................................................. 46
Code Protection ......................................................... 45
Configuration Bits and Read/Write State ................... 46
Reading ..................................................................... 44
Special Function Registers ........................................ 41
Spurious Write Protection .......................................... 45
Write Protection ......................................................... 46
Write Verify ................................................................ 45
Writing to .................................................................... 44
Connection Considerations ........................................ 94
Sample Device Configuration .................................... 94
Acknowledge Sequence Timing ................................ 86
Addressing ................................................................. 74
Associated Registers ................................................. 77
Baud Rate Generator ................................................. 79
Block Diagram ........................................................... 78
BRG Block Diagram ................................................... 79
BRG Reset due to SDA Collision ............................... 91
BRG Timing ............................................................... 80
Bus Arbitration ........................................................... 89
Bus Collision .............................................................. 89
Bus Collision Timing .................................................. 89
Clock Arbitration ........................................................ 88
Clock Arbitration Timing (Master Transmit) ............... 88
Conditions to not give ACK Pulse .............................. 74
General Call Address Support ................................... 76
Master Mode .............................................................. 78
Master Mode 7-bit Reception Timing ......................... 85
Master Mode Block Diagram ..................................... 78
Acknowledge ..................................................... 89
Repeated START Condition .............................. 92
Repeated START Condition Timing
Repeated START Condition Timing
START Condition ............................................... 90
START Condition Timing ..............................90, 91
STOP Condition ................................................. 93
STOP Condition Timing (Case1) ....................... 93
STOP Condition Timing (Case2) ....................... 93
Transmit Timing ................................................. 89
(Case1) .............................................. 92
(Case2) .............................................. 92
2001 Microchip Technology Inc.