PIC18LF2320-I/SP Microchip Technology, PIC18LF2320-I/SP Datasheet - Page 348
![IC MCU FLASH 4KX16 EEPROM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2320-I/SP
Manufacturer Part Number
PIC18LF2320-I/SP
Description
IC MCU FLASH 4KX16 EEPROM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2220-ISO.pdf
(394 pages)
3.PIC18F2220-ISO.pdf
(6 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(8 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18LF2320-I/SP
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2220-ISO PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- Current page: 348 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
FIGURE 26-23:
TABLE 26-25: A/D CONVERSION REQUIREMENTS
DS39599G-page 346
130
131
Note 1:
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
A/D DATA
SAMPLE
A/D CLK
2:
ADRES
BSF ADCON0, GO
T
T
Symbol
2: This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
ADIF
AD
CNV
GO
Q4
ADRES register may be read on the following T
The time of the A/D clock period is dependent on the device frequency and the T
executed.
132
A/D Clock Period
Conversion Time
(not including acquisition time)
A/D CONVERSION TIMING
(Note 2)
Characteristic
9
8
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
OLD_DATA
7
(1)
CY
. . .
SAMPLING STOPPED
is added before the A/D clock starts. This allows the SLEEP instruction to be
CY
. . .
131
130
cycle.
Min
1.6
3.0
2.0
3.0
11
2
20
20
Max
6.0
9.0
12
1
(2)
(2)
Units
T
μs
μs
μs
μs
AD
0
© 2007 Microchip Technology Inc.
T
T
A/D RC mode
A/D RC mode
OSC
OSC
AD
based, V
based, V
clock divider.
NEW_DATA
DONE
Conditions
T
CY
REF
REF
≥ 3.0V
full range
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