PIC18C252-I/SO Microchip Technology, PIC18C252-I/SO Datasheet - Page 138

• Manufacturer Part Number: PIC18C252-I/SO
• Description: IC MCU OTP 16KX16 A/D 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C252-I/SO

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 24
• Ram Memory Size: 1536Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Interface: I2C, SPI, USART
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 23
• Interface Type: I2C/SPI/USART
• On-chip Adc: 5-chx10-bit
• Number Of Timers: 4
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Processor Series: PIC18C
• Core: PIC
• Data Ram Size: 1536 B
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163022, DV164136
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3DB18C452 - BOARD DAUGHTER ICEPIC3309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18CXX2
14.4.5
In I
located in the lower 7 bits of the SSPADD register
(Figure 14-14). When the BRG is loaded with this
value, the BRG counts down to 0 and stops until
another reload has taken place. The BRG count is dec-
FIGURE 14-14:
FIGURE 14-15:
DS39026C-page 136
2
C Master mode, the reload value for the BRG is
BAUD RATE GENERATOR
SDA
SCL
BRG
Value
BRG
Reload
BAUD RATE GENERATOR BLOCK DIAGRAM
BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
SSPM3:SSPM0
03h
SCL
DX
SCL de-asserted but slave holds
SCL low (clock arbitration)
02h
SSPM3:SSPM0
SCL is sampled high, reload takes
place and BRG starts its count.
Reload
Control
01h
CLKOUT
BRG decrements on
Q2 and Q4 cycles
00h (hold off)
Reload
DX-1
remented twice per instruction cycle (T
and Q4 clocks. In I
reloaded automatically. If Clock Arbitration is taking
place, for instance, the BRG will be reloaded when the
SCL pin is sampled high (Figure 14-15).
BRG Down Counter
SSPADD<6:0>
SCL allowed to transition high
03h
2
C Master mode, the BRG is
F
2001 Microchip Technology Inc.
OSC
02h
/4
CY
) on the Q2