DSPIC33FJ128GP706A-I/PT Microchip Technology, DSPIC33FJ128GP706A-I/PT Datasheet - Page 80

• Manufacturer Part Number: DSPIC33FJ128GP706A-I/PT
• Description: IC DSPIC MCU/DSP 128K 64-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP706A-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 53
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 53
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 36-chx10-bit|36-chx12-bit
• Number Of Timers: 9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP3909 / dsPIC33F 3-Phase Energy Meter Reference Design
DS51723A-page 80
N-th iteration:
Where ρ
Complex rectangular quadrature algorithm or complex trapezoidal quadrature
algorithm is usually used in quasi-synchronous sampling.
Figure C-2 shows a 3-cycle interative process.
FIGURE C-2:
In practical applicatons, a frequency offset Δ is usually small, and good results may
usually be obtained through 3-5 iterations.
As mentioned above, the iterative process will result in a group of weight coefficients
η
from the numeric quadrature formula. The relationship between the iterative result and
original data is shown in Equation C-9.
EQUATION C-9:
i
, called weight coefficients of quasi-synchronous algorithm, they may be deduced
Original data
First Iteration
Second Iteration
Third Iteration
i
is the weight coefficient which is decided by the digital quadrature formula.
F
F
F
f
0
0
0
3-Cycle Iterative Process.
0
1
2
3
F
F
f
1
1
1
1
2
F
f
F
2
2
F
1
2
F
2
0
0
n
......
n
...... F
...... F
=
=
=
=
-------------- -
i
--------------- -
n
i
∑
----- -
N
=
∑
N
1
f
=
×
N
N
n
i
1
n
N
0
1
∑
1
N
=
0
×
2
⋅
ρ
η
N
n
F
i
0
i
∑
f
i
=
R
⋅
×
N+1
1
⋅
N+1
i
N
i
0
∑
n
i
=
N
⋅
∑
η
=
×
f x
0
i
( )
N
0
ρ
F
⋅
f
η
i
1
f x
i
N+2
( )
N+2
⋅
i
⋅
F
i
f x
i
( )
n 1
–
......
...... F
i
f
1
2N
2N
© 2009 Microchip Technology Inc.
f
2N+1
f
2N+2
......
f
3N