PIC16F877-20/P Microchip Technology, PIC16F877-20/P Datasheet - Page 96

• Manufacturer Part Number: PIC16F877-20/P
• Description: IC MCU FLASH 8KX14 EE 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F877-20/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 33
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F87X
9.3
For standard-mode I
resistors R
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
The supply voltage limits the minimum value of resistor
R
V
FIGURE 9-27:
DS30292C-page 94
OL
p
(input current + leakage current)
, due to the specified minimum sink current of 3 mA at
Note: I
max = 0.4V, for the specified output stages. For
Connection Considerations for
I
2
C Bus
p
connected.
2
C devices with input levels related to V
and R
s
in Figure 9-27 depend on the fol-
2
SAMPLE DEVICE CONFIGURATION FOR I
C bus devices, the values of
SDA
SCL
R
p
R
DD
p
must have one common supply line to which the pull-up resistor is also
R
s
V
DD
DEVICE
R
+ 10%
s
example, with a supply voltage of V
V
V
desired noise margin of 0.1V
the maximum value of R
and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-27).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
OL
DD
max = 0.4V at 3 mA, R
as a function of R
2
C BUS
p
due to the specified rise time
p
2
s
p
C mode (master or slave).
is shown in Figure 9-27. The
. Series resistors are optional
C
2001 Microchip Technology Inc.
min = (5.5-0.4)/0.003 = 1.7 k
b
=10 - 400 pF
DD
for the low level limits
DD
= 5V±10% and