PIC18F2580-I/ML Microchip Technology, PIC18F2580-I/ML Datasheet - Page 2
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PIC18F2580-I/ML
Manufacturer Part Number
PIC18F2580-I/ML
Description
IC PIC MCU FLASH 16KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F4480-IPT.pdf
(490 pages)
3.PIC18F4480-IPT.pdf
(8 pages)
4.PIC18F4480-IPT.pdf
(6 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F2580-ESO.pdf
(483 pages)
Specifications of PIC18F2580-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F2580-I/ML
Manufacturer:
Microchi
Quantity:
1 064
PIC18F2480/2580/4480/4580
4. Module: Interrupts
EXAMPLE 1:
DS80219E-page 2
ISR @ 0x0008
Foo:
If an interrupt occurs during a two-cycle instruction
that modifies the STATUS, BSR or WREG register,
the unmodified value of the register will be saved
to the corresponding Fast Return (Shadow)
register. Upon a fast return from the interrupt, the
unmodified value will be restored to the STATUS,
BSR or WREG register.
For example, if a high priority interrupt occurs
during the instruction “MOVFF TEMP, WREG” the
MOVFF instruction will be completed and WREG
will be loaded with the value of TEMP before
branching to ISR. However, the previous value of
WREG will be saved to the Fast Return register
during ISR branching. Upon return from the
interrupt with a fast return, the previous value of
WREG in the Fast Return register will be written to
WREG. This results in WREG containing the value
it had before execution of MOVFF TEMP, WREG.
Affected instructions are:
MOVFF
where Fd is WREG, BSR or STATUS;
MOVSF
where Fd is WREG, BSR or STATUS; and
MOVSS
where the destination is WREG, BSR or STATUS.
2. C Language Programming:
CALL
POP
:
:
RETFIE
The exact work around depends on the com-
piler in use. Please refer to your C compiler
documentation for details.
If using the Microchip MPLAB
define both high and low priority interrupt
handler functions as “low priority” by using the
pragma interruptlow
directive instructs the compiler to not use the
RETFIE FAST instruction. If the proper high
priority interrupt bit is set in the IPRx register,
then the interrupt is treated as high priority in
spite of the pragma interruptlow directive.
Fs, Fd
Zs, Fd
[Zs], [Zd]
Foo, FAST
FAST
ASSEMBLY LANGUAGE INTERRUPT SERVICE
; store current value of WREG, BSR, STATUS for a second time
; clears return address of Foo call
; insert high priority ISR code here
®
directive.
C18 C Compiler,
This
Work around
1. Assembly Language Programming:
If any two-cycle instruction is used to modify
the WREG, BSR or STATUS register, do not
use the RETFIE FAST instruction to return
from the interrupt. Instead, save and then
restore WREG, BSR and STATUS via software
as shown in Example 8-1 in the Device Data
Sheet.
Alternatively, in the case of MOVFF, use the
MOVF instruction to write to WREG instead. For
example, use:
MOVF
MOVWF
instead of MOVFF TEMP, BSR.
As another alternative, the following work
around shown in Example 1 can be used. This
example overwrites the Fast Return register by
making a dummy call to Foo with the fast
option in the high priority service routine.
TEMP, W
BSR
© 2007 Microchip Technology Inc.