PIC16LC73A-04/SO Microchip Technology, PIC16LC73A-04/SO Datasheet - Page 50

IC MCU OTP 4KX14 A/D PWM 28SOIC

PIC16LC73A-04/SO

Manufacturer Part Number
PIC16LC73A-04/SO
Description
IC MCU OTP 4KX14 A/D PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16LC73A-04/SO

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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PIC16C7X
5.4
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configurable as an input or
output.
PORTD can be configured as an 8-bit wide micropro-
cessor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
TABLE 5-7:
TABLE 5-8:
DS30390E-page 50
Name
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffer when in Parallel Slave Port Mode.
Address Name
08h
88h
89h
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.
PORTD and TRISD Registers
Applicable Devices
72 73 73A 74 74A 76 77
PORTD
TRISD
TRISE
Bit#
PORTD FUNCTIONS
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD Data Direction Register
Bit 7 Bit 6 Bit 5
RD7
IBF
OBF IBOV PSPMODE
RD6
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Bit 4
RD4
Input/output port pin or parallel slave port bit0
Input/output port pin or parallel slave port bit1
Input/output port pin or parallel slave port bit2
Input/output port pin or parallel slave port bit3
Input/output port pin or parallel slave port bit4
Input/output port pin or parallel slave port bit5
Input/output port pin or parallel slave port bit6
Input/output port pin or parallel slave port bit7
Bit 3
RD3
PORTE Data Direction Bits
Bit 2
RD2
FIGURE 5-7:
Note 1: I/O pins have protection diodes to V
Data
bus
WR
TRIS
WR
PORT
RD PORT
Bit 1
RD1
TRIS Latch
Function
Data Latch
D
D
CK
CK
RD TRIS
PORTD BLOCK DIAGRAM (IN
I/O PORT MODE)
Bit 0
RD0
Q
Q
1997 Microchip Technology Inc.
xxxx xxxx
1111 1111
0000 -111
Q
Value on:
POR,
BOR
EN
Schmitt
Trigger
input
buffer
EN
D
DD
other resets
Value on all
uuuu uuuu
1111 1111
0000 -111
and V
I/O pin
SS
(1)
.

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