PIC18F4585-I/PT Microchip Technology, PIC18F4585-I/PT Datasheet - Page 316

• Manufacturer Part Number: PIC18F4585-I/PT
• Description: IC MCU FLASH 24KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4585-I/PT

• Core Size: 8-Bit
• Program Memory Size: 48KB (24K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.25K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.25KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPI3-DB18F4680 - BOARD DAUGHTER ICEPIC3AC164305 - MODULE SKT FOR PM3 44TQFP444-1001 - DEMO BOARD FOR PICMICRO MCUAC164020 - MODULE SKT PROMATEII 44TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2585/2680/4585/4680
23.2.5
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 23-55: CIOCON: CAN I/O CONTROL REGISTER
DS39625C-page 314
bit 7-6
bit 5
bit 4
bit 3-0
CAN MODULE I/O CONTROL
REGISTER
Unimplemented: Read as ‘0’
ENDRHI: Enable Drive High bit
1 = CANTX pin will drive V
0 = CANTX pin will be tri-state when recessive
CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture, CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture, RC2/CCP1 input to CCP1 module
Unimplemented: Read as ‘0’
bit 7
Legend:
R = Readable bit
-n = Value at POR
Note 1: Always set this bit when using differential bus to avoid signal crosstalk in CANTX
U-0
—
from other nearby pins.
U-0
—
ENDRHI
W = Writable bit
‘1’ = Bit is set
R/W-0
DD
Preliminary
when recessive
(1)
(1)
CANCAP
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
U-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
U-0
—
U-0
—
bit 0