ATXMEGA256A3-MH Atmel, ATXMEGA256A3-MH Datasheet - Page 23
![MCU AVR 256K FLASH 1.8V 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATXMEGA256A3-MH
Manufacturer Part Number
ATXMEGA256A3-MH
Description
MCU AVR 256K FLASH 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATXMEGA64A3-MH.pdf
(134 pages)
Specifications of ATXMEGA256A3-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 2 Channel
On-chip Dac
2 bit, 1 Channel
Package
64QFN EP
Device Core
AVR
Family Name
XMEGA
Maximum Speed
32 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3-MU
ATXMEGA256A3-MU
ATXMEGA256A3-MU
12. System Control and Reset
12.1
12.2
12.3
12.3.1
12.3.2
12.3.3
12.3.4
12.3.5
8068T–AVR–12/10
Features
Resetting the AVR
Reset Sources
Power-On Reset
External Reset
Watchdog Reset
Brown-Out Reset
PDI reset
•
•
•
During reset, all I/O registers are set to their initial values. The SRAM content is not reset. Appli-
cation execution starts from the Reset Vector. The instruction placed at the Reset Vector should
be an Absolute Jump (JMP) instruction to the reset handling routine. By default the Reset Vector
address is the lowest Flash program memory address, ‘0’, but it is possible to move the Reset
Vector to the first address in the Boot Section.
The I/O ports of the AVR are immediately tri-stated when a reset source goes active. The reset
functionality is asynchronous, so no running clock is required to reset the device. After the
device is reset, the reset source can be determined by the application by reading the Reset Sta-
tus Register.
The MCU is reset when the supply voltage VCC is below the Power-on Reset threshold voltage.
The MCU is reset when a low level is present on the RESET pin.
The MCU is reset when the Watchdog Timer period expires and the Watchdog Reset is enabled.
The Watchdog Timer runs from a dedicated oscillator independent of the System Clock. For
more details see
The MCU is reset when the supply voltage VCC is below the Brown-Out Reset threshold voltage
and the Brown-out Detector is enabled. The Brown-out threshold voltage is programmable.
The MCU can be reset through the Program and Debug Interface (PDI).
Multiple reset sources for safe operation and device reset
Asynchronous reset
Reset status register
– Power-On Reset
– External Reset
– Watchdog Reset
– Brown-Out Reset
– PDI reset
– Software reset
– No running clock in the device is required for reset
The Watchdog Timer runs from separate, dedicated oscillator
Accurate, programmable Brown-Out levels
”WDT - Watchdog Timer” on page
24.
XMEGA A3
23