ATXMEGA256A3-MH Atmel, ATXMEGA256A3-MH Datasheet - Page 71
![MCU AVR 256K FLASH 1.8V 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATXMEGA256A3-MH
Manufacturer Part Number
ATXMEGA256A3-MH
Description
MCU AVR 256K FLASH 1.8V 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATXMEGA64A3-MH.pdf
(134 pages)
Specifications of ATXMEGA256A3-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 2 Channel
On-chip Dac
2 bit, 1 Channel
Package
64QFN EP
Device Core
AVR
Family Name
XMEGA
Maximum Speed
32 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3-MU
ATXMEGA256A3-MU
ATXMEGA256A3-MU
Table 34-18. External 32.768kHz Crystal Oscillator and TOSC characteristics
Note:
Table 34-19. Device wake-up time from sleep
Notes:
8068T–AVR–12/10
Symbol
C
Symbol
ESR/R
IN_TOSC
SF
1
1. See
1. Non-prescaled System Clock source.
2. Time from pin change on external interrupt pin to first available clock cycle. Additional interrupt response time is minimum 5
system clock source cycles.
Parameter
Idle Sleep, Standby and Extended
Standby sleep mode
Power-save and Power-down Sleep
mode
Parameter
Safety factor
Recommended crystal equivalent
series resistance (ESR)
Input capacitance between TOSC
pins
Figure 34-2 on page 71
Figure 34-2. TOSC input capacitance
The input capacitance between the TOSC pins is CL1 + CL2 in series as seen from the crystal
when oscillating without external capacitors.
for definition
Capacitive load matched to crystal
specification
Crystal load capacitance 6.5pF
Crystal load capacitance 9.0pF
Normal mode
Low power mode
Int. 32.768 kHz RC
Int. 2 MHz RC
Ext. 2 MHz Clock
Int. 32 MHz RC
Int. 32.768 kHz RC
Int. 2 MHz RC
Ext. 2 MHz Clock
Int. 32 MHz RC
TOSC1
Condition
Condition
32.768 KHz crystal
Device internal
(1)
C
L1
External
C
L2
Min
Min
3
TOSC2
Typ
0.17
10.3
Typ
130
320
1.7
2.2
4.5
5.8
2
2
(2)
XMEGA A3
Max
Max
60
35
Units
Units
µS
kΩ
pF
71